Cloud native EDA tools & pre-optimized hardware platforms
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Synopsys, Inc. (Nasdaq: SNPS) today announced its collaboration with SiMa.ai to bring its machine learning inference at scale to the embedded edge. Through this engagement, SiMa.ai has adopted key...
Highlights: DesignWare IP portfolio for GF 12LP+ solution includes USB4, PCIe 5.0, Die-to-Die HBI and 112G USR/XSR, 112G Ethernet, DDR5, LPDDR5, MIPI, OTP NVM and more Long-standing collaboration...
Highlights JLQ Technology has adopted Synopsys' broad DesignWare IP portfolio to reduce risk and speed time-to-market for next-generation mobile chipsets High-quality DesignWare IP for USB, MIPI,...
Highlights: Early adopters of Arm Cortex-A78 CPU and Mali-G78 GPU, as well as Arm Cortex-X Custom program partners of Cortex-X1 CPU, have successfully taped out SoCs for smartphones, laptops, and...
Highlights: DesignWare MIPI C-PHY/D-PHY IP interoperates with Synopsys' MIPI CSI-2, DSI/DSI-2, D-PHY, and verification IP for a complete camera and display IP solution The C-PHY/D-PHY delivers...
Highlights: Ultra-low power DesignWare Die-to-Die PHY IP delivers less than 1pJ/bit for optimal energy efficiency in hyperscale data centers Compact analog front-end enables reliable links up to...
Highlights: DesignWare PHY IP in development on TSMC's N5P process includes USB, DisplayPort, DDR, LPDDR, HBM, PCI Express, Ethernet, MIPI, and HDMI DesignWare Foundation IP on TSMC's N5P process...
Highlights: DesignWare IP portfolio for GLOBALFOUNDRIES 12LP FinFET process includes Multi-Protocol 25G, USB 3.0 and 2.0, PCI Express 2.0, DDR4, LPDDR4/4X, MIPI D-PHY, SD-eMMC, and Data Converters...
Highlights: Synopsys' Fusion Design Platform enables faster implementation with optimized PPA for Arm processors QuickStart Implementation Kit (QIK) using Arm Artisan Physical IP and POP IP,...
Highlights: DesignWare VESA DSC IP is compliant with the VESA DSC 1.1 and 1.2a standards, delivering the required 120Hz refresh rate for up to 10K resolutions Configurable IP scales up to 16...
Highlights: Silicon-proven DesignWare PHY IP on TSMC's 7nm FinFET process includes USB, DDR, LPDDR, HBM, PCI Express, MIPI, DisplayPort, and Ethernet Successful customer tapeouts of DesignWare...
Highlights: Synopsys DesignWare IP for automotive Grade 1 and Grade 2 temperature operation on GLOBALFOUNDRIES 22FDX® process includes Logic Libraries, Embedded Memories, Data Converters, LPDDR4,...
Synopsys, Inc. (Nasdaq: SNPS) and FABU Technology Co., Ltd. today announced that FABU has selected a portfolio of silicon-proven Synopsys DesignWare® Interface, Security, ARC® EM Safety Island...
Highlights: Tapeouts of DesignWare Logic Libraries, Embedded Memories, USB, DisplayPort, PCI Express, and MIPI M-PHY in N7+ demonstrate high quality and robustness of the IP DesignWare PHY IP in...
Highlights: Broad portfolio of controller and PHY IP in the 7-nm process includes LPDDR4X, MIPI CSI-2 and D-PHY, PCI Express 4.0, and security IP IP solutions implement advanced automotive-grade...
Highlights: Synopsys' Design Platform with Fusion Technology enables faster implementation with optimized PPA for Arm cores QuickStart Implementation Kit (QIK), including scripts and reference...
Highlights: Complete DesignWare UFS IP solution consists of the UFS controller v3.0, MIPI UniPro controller v1.8, silicon-proven MIPI M-PHY v4.1, verification IP, and IP Prototyping Kit The M-PHY...
Highlights: The IoT platform based on Synopsys' ARC Data Fusion IP Subsystem and interface IP, implemented by Brite's expert design services for SMIC's 55-nm ultra-low power process accelerates...
Highlights: TSMC selects Synopsys as its "Partner of the Year" for interface IP and tool enablement for the 7th consecutive year TSMC has certified Synopsys' digital and custom implementation...
Highlights: Synopsys' successful tape-outs of DesignWare Interface PHY IP for TSMC's 7-nm process include USB 3.1/2.0, DisplayPort 1.4, PCI Express 4.0/3.1, DDR4, MIPI D-PHY, Ethernet and SATA 6G,...
Highlights: AEC-Q100 designed and tested DesignWare IP includes LPDDR4, MIPI D-PHY, PCI Express 3.1 and Ethernet on 16-nm FinFET process technologies IP with available test reports meets Grade 1...
Highlights: Complete DesignWare MIPI DSI Host Controller with VESA DSC encoder and MIPI D-PHY easily integrates into application processors with less risk Integrated MIPI display IP reduces memory...
Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the industry's first verification IP (VIP) and source code test suite for MIPI CSI-2℠ v2.0, MIPI D-PHY℠ v2.1, MIPI C-PHY℠...
Highlights: New ASIL B Ready certified controllers and PHY IP includes PCI Express, USB, MIPI and LPDDR4 Industry's first ASIL D Ready ISO 26262 certified EEPROM and Trim NVM IP deliver...
Highlights: ARC Data Fusion IP Subsystem includes choice of ARC EM DSP processor (EM5D, EM7D, EM9D or EM11D), tightly coupled memory, peripherals and hardware accelerators that reduce SoC area and...
Highlights: DesignWare Interface IP portfolio for TSMC 12FFC process includes USB, DisplayPort, PCI Express, DDR, LPDDR, SATA, MIPI, Ethernet and HDMI 12-bit data converters with high-performance...
Faraday Technology Corporation and Synopsys, Inc. (Nasdaq:SNPS) today announced the expansion of Faraday's design services to include a virtual prototyping solution. Faraday's SoReal!™ Virtual...
Highlights: TSMC selects Synopsys as its "Partner of the Year" for interface IP and tool enablement for the 6th consecutive year TSMC has certified Synopsys' digital and custom implementation...
Highlights: DesignWare Foundation IP meets automotive Grade 1 temperature (-40C to +150C junction) requirements, delivering high reliability for automotive SoCs ASIL D Ready Embedded Memories,...
Highlights: Successful customer tapeouts of Synopsys DesignWare Logic Libraries and Embedded Memories on 7-nm demonstrates high quality and reduces integration risk Integrated Synopsys STAR Memory...
Highlights: DesignWare MIPI DSI Device Controller implements low-power and high-speed modes for video and command displays MIPI CSI-2 Device Controller enables merging of multiple video streams at...
Highlights: I3C compliant IP future-proofs sensor designs and enables high data transmission for integration of multiple sensors on an SoC A single 2-wire I3C interface provides low pin count for...
Highlights: DesignWare interface and analog IP portfolio for TSMC 16FFC process includes USB 3.1/3.0/2.0, USB Type C 3.1/DisplayPort 1.3, DDR4/3, LPDDR4, PCI Express 4.0/3.1/2.1, SATA 6G, HDMI...
Highlights: SK Hynix delivered a more energy-efficient product using ultra-low standby power and fast exit/entry latency features in the IP Increased performance by utilizing the MIPI M-PHY...
Highlights: Industry's first demonstration to be unveiled at the MIPI® Alliance Open and Demo Day in Taipei, October 29, 2015 Synopsys' silicon-proven, compliant D-PHYSM v1.2 on 16FF+ technology...
Highlights: TSMC selects Synopsys as its "Partner of the Year" for interface IP and tool enablement for the 5th consecutive year Synopsys' Digital and Custom Implementation tools and reference...
Highlights: Broad IP portfolio for IoT designs includes logic libraries, memory compilers, non-volatile memory, data converters, wired and wireless interface IP, security IP, processor cores and a...
Highlights: Synopsys' successful tape-out of IP for TSMC 10-nm process includes USB 3.1, USB 3.0, USB 2.0, HSIC, PCI Express 3.0, PCI Express 2.0 and MIPI D-PHY Tape-out of DesignWare IP enables...
Highlights: USB femtoPHY IP cuts area by 50 percent and incorporates power down and low-power features for extended battery life PCI Express 3.1 IP solution with chip-to-chip, backplane and...
Highlights: DesignWare IP portfolio for automotive applications includes Ethernet AVB, LPDDR4, MIPI CSI-2 and DSI, HDMI, PCI Express, USB, Mobile Storage, Logic Libraries, Embedded Memories, NVM,...
Highlights: Platform includes pre-verified sensor and control IP subsystem with ARC EM5D processor as well as logic libraries, memory compilers, NVM, MIPI, USB and ADC Thick-oxide logic libraries...
Highlights: DesignWare Interface PHY IP portfolio for TSMC 16FF+ processes includes USB 3.0, 2.0 and HSIC; 16G PHY; PCI Express 4.0, 3.0 and 2.0; SATA 6G; HDMI 2.0; MIPI D-PHY; DDR4 and LPDDR4/3/2 IP
Highlights: The compliant and interoperable DSI solution reduces data transmission bandwidth by compressing and transmitting video signals through existing display interfaces for ultra-high resolution
Synopsys, Inc. (NASDAQ: SNPS) announces the availability of verification IP (VIP) for the MIPI® Alliance SoundWireSM 1.0 specification. Synopsys VIP for MIPI SoundWire is based on a native...
Synopsys, Inc. (NASDAQ: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the expansion of its memory...
Highlights: Rockchip accelerated project schedule by months with a range of DesignWare USB, HDMI and MIPI IP Acquired silicon-proven IP solutions that delivered significantly higher performance,...
Highlights: DesignWare IP Prototyping Kits, part of Synopsys' IP Accelerated initiative, provide the essential hardware and software elements needed to reduce IP prototyping and integration effort...
Highlights: TSMC selects Synopsys as its "Partner of the Year" for interface IP and tool enablement for the 5th consecutive year The Interface IP Partner of the Year award selection criteria...
Synopsys, Inc. (NASDAQ: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the availability of verification...
Highlights: Achieved first-pass silicon success and accelerated time to market by four months with DesignWare MIPI D-PHY and DSI Host Controller Gained competitive advantage with silicon-proven...