Cloud native EDA tools & pre-optimized hardware platforms
MOUNTAIN VIEW, Calif., April 20, 2017 /PRNewswire/ --
Synopsys, Inc. (Nasdaq: SNPS) today announced it has enhanced its DesignWare® ARC® Data Fusion IP Subsystem with a new suite of tightly coupled interface peripherals including pulse density modulation (PDM), I2S and I3C, as well as an audio processing software library to speed application software development. The Data Fusion IP Subsystem is an integrated, pre-verified hardware and software IP product optimized for use in devices requiring minimal energy consumption. The latest enhancements to the subsystem simplify the implementation of voice and speech functionality in a range of applications such as far-field voice user interfaces and hands-free voice commands. In addition, the standards-compliant MIPI I3C controller enables high data rate transmission for the integration of multiple sensors in a system-on-chip (SoC). The DesignWare ARC Data Fusion IP Subsystem offers the choice of an ARC EM DSP processor (EM5D, EM7D, EM9D or EM11D) and delivers the efficient real-time control and DSP performance required for ultra-low-power IoT applications requiring sensor fusion, audio playback, voice detection and speech recognition.
"The audio, voice and speech requirements of IoT devices demand excellent DSP performance within tight area and power budgets," said Dr. Alexander Goldin, CEO at Alango Technologies. "The combination of Synopsys' power-efficient ARC Data Fusion IP Subsystem with our voice enhancement software provides developers with an excellent solution that can be rapidly deployed into SoCs for always-on applications."
The ARC Data Fusion IP Subsystem processes data from digital and analog sensors with minimal energy consumption, offloading the host processor and enabling more efficient data processing. The fully configurable subsystem, with its choice of power-efficient ARC EM DSP processors, delivers a 2x performance boost for typical signal processing functions such as filtering, matrix operations and complex math compared to other available processors. In addition, the subsystem significantly reduces frequency and memory requirements to run audio codecs and speech/voice communication software, saving energy and costly die area.
The ARC Data Fusion IP Subsystem also includes an audio processing software library of common functions, including gain control, mixer and sample rate converter. Tightly coupled PDM and I2S peripherals simplify integration of external audio devices such as MEMS microphones used for far-field voice user interfaces and hands-free voice commands. The hardware PDM interface implementation is 6x more energy efficient than the equivalent software implementation, with minimal gate count impact. An optional MIPI I3C master/slave peripheral, compliant with the MIPI Camera Control Interface (CCI), I2C and I3C specifications, provides a high-performance sensor interface. It is equivalent to SPI performance and backward compatible with I2C interfaces. The integrated I3C peripheral and included software driver simplify mobile sensor integration and provide power and area savings over discrete implementations.
In addition, the separately licensable ARC CryptoPack option provides special instructions that accelerate common cryptographic algorithms such as AES, SHA-256, RSA and ECC (elliptic curve cryptography) to deliver up to 7x greater performance compared to software-only implementations. Synopsys' embARC Open Software Platform gives software developers online access to a comprehensive suite of free and open-source software that accelerates code development for the IP subsystem.
"The proliferation of voice-enabled IoT devices requires designers to incorporate more audio capabilities into their SoCs while maintaining performance efficiency and minimal power consumption," said John Koeter, vice president of marketing for IP at Synopsys. "With the latest enhancements to the silicon-proven DesignWare ARC Data Fusion IP Subsystem, designers can efficiently integrate the voice and speech functionality required for multi-sensor IoT designs and accelerate their project schedule."
Availability & Resources
The ARC Data Fusion IP Subsystem with new IoT audio and high-performance sensor support is planned to be available in May 2017.
Learn more about DesignWare ARC Subsystems.
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit https://www.synopsys.com/designware.
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at https://www.synopsys.com/.
SOURCE Synopsys, Inc.