Press Releases
Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
-
Dec 16, 2013LightTools version 8.1 is now generally available
-
Dec 10, 2013Ellisys Protocol Analyzer Confirms Performance of 10 Gbps USB 3.1 Effective Data Rates, More Than Doubling SuperSpeed USB Throughput for Consumer Applications
-
Dec 9, 2013Silicon-Proven DesignWare IP, Lynx Design System and Consulting Services Reduce Integration Risk and Reduce Time-to-Market by Three Months
-
Dec 4, 2013Q4 2013 Financial Highlights
-
Nov 26, 2013Industry-Leading VCS the Only Verification Technology Capable of Meeting Highest Reliability and Capacity Verification Requirements
-
Nov 20, 2013DesignWare Multiple-Time Programmable NVM IP Reduces System Costs for Wireless and RFID / NFC Tag Applications
-
Nov 12, 2013HPC Design Kit of Optimized Embedded Memories and Logic Libraries Yields 8 Percent Performance Improvement and 13 Percent Leakage Power Reduction with Smaller Area for CEVA-XC DSPs
-
Nov 6, 2013Use of Silicon-Proven DesignWare IP by More than 600 Companies Demonstrates High Quality and Low Integration Risk
-
Nov 6, 2013Synopsys' Transfer of TLMCentral to Design & Reuse IP Portal Enables Easy Search of More Than 1000 IP Models to Speed SoC Software Development
-
Nov 5, 2013New Performance-Efficient Design Optimized for Maximum DMIPS/mm2 and DMIPS/milliwatt
-
Oct 30, 2013Platform Architect with New SystemC Model for ARM CoreLink NIC-400 Network Interconnect Enables Optimization of SoC Performance from among Thousands of Configurations
-
Oct 28, 2013Discovery VIP Successfully Leveraged by Early Licensees Now Broadly Available
-
Oct 23, 2013Recognizing leadership and contribution to standards-based collaboration across industry
-
Oct 22, 2013DesignWare IP Optimized to Address Throughput and Quality-of-Service Requirements in Modern Data Center SoCs
-
Oct 15, 2013Integrated Safety Features and ASIL D Ready Compiler Ease Development of ISO 26262-Compliant SoC Designs
-
Oct 14, 2013TSMC Includes Analog/Mixed-Signal Products for 16-nm Design Requirements
-
Oct 14, 2013Synopsys Recognized for Valuable Contributions Towards Development of FinFET Technology
-
Oct 1, 2013Award Recognizes Technical Leadership, Number of Customer Tape-Outs, and Outstanding Customer Support
-
Oct 1, 2013New TLM Subsystem Flow and Eclipse IDE Integration Speed VDK Availability for Software Developers
-
Sep 19, 2013Silicon-proven Synopsys IP Portfolio on TSMC's 20SoC Process Technology Enables Designers to Reduce Power Consumption and Increase Performance for Mobile and Multimedia SoC Designs
-
Sep 12, 2013CODE V version 10.6 is now generally available
-
Sep 11, 2013Successful SSIC Interoperability Reduces Integration Risk and Speeds Time-to-Market for Mobile and Wireless Designs
-
Sep 9, 2013Significantly Reduces Test Integration Time and Improves Test QoR for Hierarchical SoCs
-
Sep 9, 2013Customers Realizing Up to 3x Higher Compression with Fewer Test Pins
-
Sep 8, 2013TSMC Certifies Laker Custom Design Solution for 16-nm FinFET and Provides iPDK
-
Sep 5, 2013Full Support for New HDMI 2.0 Specification Provides Flickerless 4K x 2K Resolution for HDTVs
-
Sep 4, 2013Annual Competition Recognizes Student Achievements in Optical Design
-
Sep 3, 2013Achieves Area and Power Reduction Critical to Success in the Mobile Market
-
Aug 21, 2013Q3 2013 Financial Highlights
-
Aug 12, 2013Support for Dolby Laboratories' Multistream Decoding Expands Portfolio of ARC Audio Codecs
-
Aug 5, 2013Synopsys' Synplify Pro Software Delivers Optimal Logic Synthesis Results for Users of Lattice Semiconductor FPGAs and CPLDs
-
Jul 30, 2013Configurable Hardware and Software IP Solution Enables Rapid Integration of Sensor Functionality into SoCs
-
Jul 17, 2013Latest Generation Reduces Power Consumption by up to 76 Percent and Area Use by up to 86 Percent for Mobile Communication SoCs
-
Jul 9, 2013Custom DSP Reduces Power Consumption by 20 Percent Compared to Other Commercially-Available DSP IP
-
Jun 26, 2013Process Qualification Vehicle Tapeout Validates UMC 14-nm FinFET Process Using Synopsys DesignWare IP and StarRC Parasitic Extraction Tool
-
Jun 25, 2013Comprehensive DesignWare IP Solution, Including Silicon-Proven MIPI M-PHY and M-PCIe Controller IP, Enables Early M-PCIe Adoption for Low-Power Designs
-
Jun 24, 2013Synopsys Brings its Expertise in 3D-IC Solutions to Singapore's A*STAR IME-Led 2.5D Through-Silicon Interposer Consortium
-
Jun 19, 2013Silicon-Proven DesignWare IP and Consulting Services Reduce Integration Risk and Help Accelerate Deployment of Complete SoC Design Flow
-
Jun 17, 2013New Formality Ultra Extends Equivalency Checking to Accelerate Design Closure
-
Jun 12, 2013DesignWare HPC Design Kit Yields Superior Performance, Power and Area for CPU, GPU and DSP Cores
-
Jun 11, 2013Innovative Technology Includes Advances for Pin-Limited Test
-
Jun 3, 2013Silicon-Validated Solution Developed Through Multi-year Collaboration
-
May 29, 2013V0.1 Certification Based on Collaboration over Key Foundational Technologies
-
May 29, 2013Versatile Platform for Software Development Shortens Time-to-Market for Design Teams Using ARC EM Processor Cores
-
May 23, 2013Joint Center of Excellence Produces Virtualizer Development Kit Enabling Early Software Development, System Integration and Test for RH850-based Automotive Designs
-
May 23, 2013Industry Experts, Customers and Partners to Provide Insight into the Latest Technology Advancements, Trends and Capabilities Leveraging Synopsys' Innovative Solutions
-
May 22, 2013Q2 2013 Financial Highlights
-
May 17, 2013Silicon-Proven PCI Express 3.0 Digital Controller and PHY IP Solution Lowers Integration Risk for SoC Designs
-
May 13, 2013Synopsys Uniquely Proven for the Emerging New Wave of FinFET-based Process Technology
-
May 8, 2013Latest IC Compiler Innovations Meet Performance Targets on Time
-
May 6, 2013New Innovations Address ECO Closure, High-speed Design and Emerging Process Nodes
-
Apr 29, 2013New VDK Enables Automotive Suppliers and OEMs to Start Software Development Prior to ECU Board Availability
-
Apr 25, 2013Reduces Development Time for Power- and Performance-Optimized Application-Specific Processors from Months to Weeks
-
Apr 15, 2013Synopsys IC Validator Enables LG Electronics to Accelerate Manufacturing Compliance
-
Apr 9, 2013DesignWare MIPI IP Enables Silicon and Commercial Success of High-Performance, Low-Power Baseband Processor
-
Mar 25, 2013New technology can significantly reduce signoff iterations at advanced nodes
-
Mar 25, 2013New Shape-Based Router Brings Automatic Custom Net Routing to IC Compiler Users
-
Mar 21, 2013Optimized Methodologies for ARM's Cortex-A15, Cortex-A7 and CCI-400 Solutions Help Designers Achieve Processor Performance and Power Objectives Faster
-
Mar 19, 2013Solutions Include Galaxy Custom and Digital Implementation, Discovery Verification Platform
-
Feb 25, 2013Proteus LRC Offers Highly Accurate Hotspot Detection with the Lowest Cost of Ownership
-
Feb 21, 2013First Mali-T658 Tapeout on 20nm Technology Based on Galaxy Implementation Platform DPT-compliant Flow
-
Feb 20, 2013Q1 2013 Financial Highlights
-
Feb 11, 2013New Virtualizer Development Kits for ARMv8 Processors Enable Early Software Development Up To One Year in Advance of Silicon
-
Feb 7, 2013Enhancements Accelerate Verification of Advanced-node Memory Designs
-
Feb 7, 2013Successful Collaboration Simplifies Design Closure for Manufacturing, Helps Accelerate Time to Silicon
-
Jan 30, 2013Multi-year Collaboration Results in Deployment of Synopsys' Advanced Formal Debug Technology for Verification of PowerVR Graphics Intellectual Property (IP) Cores
-
Jan 23, 2013Achieves aggressive 400 microwatt power goal on multi-core hearing aid DSP IC
-
Jan 22, 2013FinFET Technology Support Developed over Five-year Collaboration with Industry Leaders
-
Jan 22, 2013Contribution Underscores Synopsys' Commitment to an Open Custom Design Ecosystem
-
Jan 21, 2013Companies Extend SoC Verification Collaboration on Simulation, Debug and Verification IP
-
Jan 7, 2013ASMedia, Generalplus and Socle save weeks in timing closure
-
Dec 20, 2012Collaboration Encompasses Synopsys IP, Design Implementation, Extraction and Signoff Tools
-
Dec 17, 2012Next-generation Discovery VIP Provides High Performance, Advanced Features, and Ease-of-Use to Accelerate SoC Verification
-
Dec 12, 2012Collaboration Enhances Synopsys' Sentaurus TCAD Models for Next-generation FinFET Technology
-
Dec 5, 2012Q4 2012 Financial Highlights
-
Dec 2, 2012
-
Nov 14, 2012Collaboration brings key Synopsys technology to TSMC DFM Data Kit
-
Nov 12, 2012Synopsys' HAPS-70 Series' Scalable Architecture and Integrated Hardware/Software Prototyping Flow Accelerate Throughput While Increasing Prototyping Capacity to 144 Million ASIC Gates
-
Nov 6, 2012STAR Memory System's New Architecture and Test Algorithms Reduce Test Area up to 30 percent and Increase Coverage for New Memory Defects
-
Nov 5, 2012Design-centric Volume Diagnostics Accelerate Identification of Systematic Failure Mechanisms
-
Oct 31, 2012New Features Include Fast Error Identification, Incremental Fix and Customizable Reporting for Faster FPGA Implementation and Prototype Bring-Up
-
Oct 29, 2012Next-generation Discovery Verification IP Enables Identification and Debug of SoC Performance Bottlenecks
-
Oct 22, 2012UMC Qualification Brings More Process and Foundry Choices to IC Compiler and IC Validator User Base
-
Oct 17, 2012Excellent Customer Support, Technical Leadership and Number of Customer Tape-Outs Cited as Key Selection Criteria
-
Oct 17, 2012Recognizes Synopsys' Valuable Contributions towards Development of 20-nm Technology
-
Oct 16, 2012Synopsys' Saber Physical Modeling and Simulation Platform to be used in 57 Worldwide Automotive Design Educational Programs
Press Kit
About Us
Publications