Press Releases
Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Jun 26, 2013Process Qualification Vehicle Tapeout Validates UMC 14-nm FinFET Process Using Synopsys DesignWare IP and StarRC Parasitic Extraction Tool
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Jun 25, 2013Comprehensive DesignWare IP Solution, Including Silicon-Proven MIPI M-PHY and M-PCIe Controller IP, Enables Early M-PCIe Adoption for Low-Power Designs
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Jun 24, 2013Synopsys Brings its Expertise in 3D-IC Solutions to Singapore's A*STAR IME-Led 2.5D Through-Silicon Interposer Consortium
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Jun 19, 2013Silicon-Proven DesignWare IP and Consulting Services Reduce Integration Risk and Help Accelerate Deployment of Complete SoC Design Flow
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Jun 17, 2013New Formality Ultra Extends Equivalency Checking to Accelerate Design Closure
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Jun 12, 2013DesignWare HPC Design Kit Yields Superior Performance, Power and Area for CPU, GPU and DSP Cores
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Jun 11, 2013Innovative Technology Includes Advances for Pin-Limited Test
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Jun 3, 2013Silicon-Validated Solution Developed Through Multi-year Collaboration
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May 29, 2013V0.1 Certification Based on Collaboration over Key Foundational Technologies
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May 29, 2013Versatile Platform for Software Development Shortens Time-to-Market for Design Teams Using ARC EM Processor Cores
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May 23, 2013Joint Center of Excellence Produces Virtualizer Development Kit Enabling Early Software Development, System Integration and Test for RH850-based Automotive Designs
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May 23, 2013Industry Experts, Customers and Partners to Provide Insight into the Latest Technology Advancements, Trends and Capabilities Leveraging Synopsys' Innovative Solutions
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May 22, 2013Q2 2013 Financial Highlights
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May 17, 2013Silicon-Proven PCI Express 3.0 Digital Controller and PHY IP Solution Lowers Integration Risk for SoC Designs
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May 13, 2013Synopsys Uniquely Proven for the Emerging New Wave of FinFET-based Process Technology
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May 8, 2013Latest IC Compiler Innovations Meet Performance Targets on Time
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May 6, 2013New Innovations Address ECO Closure, High-speed Design and Emerging Process Nodes
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Apr 29, 2013New VDK Enables Automotive Suppliers and OEMs to Start Software Development Prior to ECU Board Availability
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Apr 25, 2013Reduces Development Time for Power- and Performance-Optimized Application-Specific Processors from Months to Weeks
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Apr 15, 2013Synopsys IC Validator Enables LG Electronics to Accelerate Manufacturing Compliance
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Apr 9, 2013DesignWare MIPI IP Enables Silicon and Commercial Success of High-Performance, Low-Power Baseband Processor
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Mar 25, 2013New technology can significantly reduce signoff iterations at advanced nodes
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Mar 25, 2013New Shape-Based Router Brings Automatic Custom Net Routing to IC Compiler Users
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Mar 21, 2013Optimized Methodologies for ARM's Cortex-A15, Cortex-A7 and CCI-400 Solutions Help Designers Achieve Processor Performance and Power Objectives Faster
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Mar 19, 2013Solutions Include Galaxy Custom and Digital Implementation, Discovery Verification Platform
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Feb 25, 2013Proteus LRC Offers Highly Accurate Hotspot Detection with the Lowest Cost of Ownership
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Feb 21, 2013First Mali-T658 Tapeout on 20nm Technology Based on Galaxy Implementation Platform DPT-compliant Flow
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Feb 20, 2013Q1 2013 Financial Highlights
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Feb 11, 2013New Virtualizer Development Kits for ARMv8 Processors Enable Early Software Development Up To One Year in Advance of Silicon
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Feb 7, 2013Enhancements Accelerate Verification of Advanced-node Memory Designs
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Feb 7, 2013Successful Collaboration Simplifies Design Closure for Manufacturing, Helps Accelerate Time to Silicon
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Jan 30, 2013Multi-year Collaboration Results in Deployment of Synopsys' Advanced Formal Debug Technology for Verification of PowerVR Graphics Intellectual Property (IP) Cores
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Jan 23, 2013Achieves aggressive 400 microwatt power goal on multi-core hearing aid DSP IC
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Jan 22, 2013FinFET Technology Support Developed over Five-year Collaboration with Industry Leaders
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Jan 22, 2013Contribution Underscores Synopsys' Commitment to an Open Custom Design Ecosystem
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Jan 21, 2013Companies Extend SoC Verification Collaboration on Simulation, Debug and Verification IP
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Jan 7, 2013ASMedia, Generalplus and Socle save weeks in timing closure
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Dec 20, 2012Collaboration Encompasses Synopsys IP, Design Implementation, Extraction and Signoff Tools
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Dec 17, 2012Next-generation Discovery VIP Provides High Performance, Advanced Features, and Ease-of-Use to Accelerate SoC Verification
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Dec 12, 2012Collaboration Enhances Synopsys' Sentaurus TCAD Models for Next-generation FinFET Technology
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Dec 5, 2012Q4 2012 Financial Highlights
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Dec 2, 2012
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Nov 14, 2012Collaboration brings key Synopsys technology to TSMC DFM Data Kit
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Nov 12, 2012Synopsys' HAPS-70 Series' Scalable Architecture and Integrated Hardware/Software Prototyping Flow Accelerate Throughput While Increasing Prototyping Capacity to 144 Million ASIC Gates
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Nov 6, 2012STAR Memory System's New Architecture and Test Algorithms Reduce Test Area up to 30 percent and Increase Coverage for New Memory Defects
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Nov 5, 2012Design-centric Volume Diagnostics Accelerate Identification of Systematic Failure Mechanisms
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Oct 31, 2012New Features Include Fast Error Identification, Incremental Fix and Customizable Reporting for Faster FPGA Implementation and Prototype Bring-Up
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Oct 29, 2012Next-generation Discovery Verification IP Enables Identification and Debug of SoC Performance Bottlenecks
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Oct 22, 2012UMC Qualification Brings More Process and Foundry Choices to IC Compiler and IC Validator User Base
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Oct 17, 2012Excellent Customer Support, Technical Leadership and Number of Customer Tape-Outs Cited as Key Selection Criteria
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Oct 17, 2012Recognizes Synopsys' Valuable Contributions towards Development of 20-nm Technology
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Oct 16, 2012Synopsys' Saber Physical Modeling and Simulation Platform to be used in 57 Worldwide Automotive Design Educational Programs
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Oct 15, 2012Design Tools Selected in Reference Flow for Physical Implementation, RC Extraction, Timing Analysis and Physical Verification
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Oct 11, 2012Design Tools Selected in TSMC's First Integrated, Validated Reference Flow and Design Kit Enabling Multi-Die Integration Using TSMC CoWoS Technology
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Oct 9, 2012CODE V version 10.5 is now generally available
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Oct 5, 2012Synopsys Hosts 418 Bright, Young Professionals from 14 Countries at the Seventh Annual International Microelectronics Olympiad of Armenia during Synopsys Week
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Oct 4, 2012Acquisition Adds High-Performance, High-Capacity Emulation to Verification Platform
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Oct 2, 2012Success Drives Open-Silicon to use Galaxy Implementation Platform for High-Performance Design
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Sep 24, 2012New DesignWare UniPro Controller IP Streamlines Development of Storage, Camera and Display Interfaces
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Sep 20, 2012Reaches one million unique experiences for students and teachers developing science projects
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Sep 19, 2012Performance, Intelligent Debug and Advanced Coverage Features Led to Selection of Next-Generation VIP
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Sep 18, 2012Memory Controller and PHY Support Multiple DDR Standards While Reducing Latency and Standby Power
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Sep 6, 2012Advances Include Faster Runtime, ECO Flows and New Process Modeling Technology
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Sep 6, 2012OptSim version 5.3 is now generally available
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Sep 5, 2012Collaborating with Standards Board Industry Leaders to Ensure Broad Ecosystem Enablement
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Sep 5, 2012Tens of Millions of Units Shipped and More Than 30 Test Chip Tape-Outs Demonstrates DesignWare IP Robustness
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Aug 22, 2012Q3 2012 Financial Highlights
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Aug 16, 2012Annual Competition Recognizes Student Achievements in Optical Design
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Aug 9, 2012Participation by the world's largest professional engineering association highlights the Olympiad's growing international reputation
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Aug 8, 2012VIP-Central.org Serves as an Online Resource Connecting Protocol and Verification IP Experts to SoC Verification Engineers
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Aug 3, 2012Acquisition Will Complement Synopsys' Technology Portfolio and Help Accelerate Delivery of SoC Debug and Custom Implementation Tools to Customers
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Aug 1, 2012Joint Engineering Team Will Develop Virtual Prototypes to Speed Software Debug and System Testing for Renesas' RH850 Microcontroller-Based Designs
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Jul 30, 2012Acquisition Strengthens Synopsys Custom Design Solution and Underscores its Commitment to Enabling Interoperable Process Design Kit Ecosystem
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Jul 24, 2012Synopsys Mixed-Signal IC Design Solution Qualified for TowerJazz Power Management Reference Flow 2.0Collaboration Delivers Comprehensive Power Management Solution
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Jul 24, 2012New Modeling Interface and Automation Increase Modeling Productivity to Enable Earlier Start of Software Development
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Jul 18, 2012Continued Performance Focus Fortifies Widespread Deployment at Renesas Electronics
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Jul 10, 2012Synopsys’ DesignWare Embedded Memory, Logic Library, Analog and Interface IP for SMIC’s Advanced Low-Power Process Enables Faster Development of SoCs for Mobile Markets
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Jul 9, 2012Industry-First Support for New PCIe L1 Sub-States Reduces Power Consumption
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Jun 27, 2012Highly Accurate Lithography Verification Solution Offers Lowest Cost of Ownership
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Jun 26, 2012AURIX Virtual Prototype Enabled Automotive Software Developers to Start 12 Months Before Silicon Availability
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Jun 18, 2012Approximately 500 volunteers will donate 3,000 hours refurbishing Lee Mathson Middle School
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Jun 11, 2012LightTools version 7.3 is now generally available
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Jun 4, 2012Solution Includes Place and Route, Physical Verification, and Signoff Design Tools
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Jun 4, 2012Out-of-the-Box Solution Seamlessly Integrates Virtualizer™ Virtual Prototyping and HAPS® FPGA-Based Prototyping to Accelerate SoC Software and Hardware Development
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May 30, 2012First in MENA Region to Establish New Full- and Semi-custom IC Design Laboratories
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