Press Releases
Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Jan 30, 2017Cheetah Fine-Grained Parallelism Technology Natively Available in VCS 2017.03; Delivers Breakthrough Performance on Existing x86 CPU Server Configurations
Jan 26, 2017DesignWare ARC HS38 Dual-Core Processor, DDR4 and PCI Express 3.1 IP Enable Higher Performance and Lower Power for Starblaze's MB1000 Enterprise SSD Controller
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Jan 16, 2017TetraMAX II ATPG Speeds Test Generation by 10x and Reduces Patterns by 50 Percent
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Jan 10, 2017Acquisition Adds Coverage for Fortran Programming Language to Coverity Static Analysis Solution
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Jan 5, 2017SoReal! Virtual Platform Accelerates Software Development 12 Months before Hardware Availability
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Dec 8, 2016Native SystemVerilog DisplayPort VIP Includes Built-In Coverage, Verification Planning and Protocol-Aware Debug
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Dec 7, 2016New Automation Technology Brings 5x - 10x Reduction in Compute Costs and Runtime
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Dec 7, 2016Latest Release Speeds Simulation of Long-Haul Optical Transmission Systems and Photonic Integrated Circuits
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Dec 5, 2016Model Developed Through Collaboration Between Synopsys and IIT Bombay to Simulate Negative-Bias Temperature Instability in FinFET and Nanowire FET at 7nm, 5nm and Below
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Nov 30, 2016Q4 2016 Financial Highlights
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Nov 15, 2016STAR Memory System's Multi-Memory Bus Processor Cuts Test Logic Area While Maintaining High CPU Performance
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Nov 14, 2016New Capabilities Accelerate Time to Automotive Test Goals and ISO 26262 Certification
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Nov 14, 2016Increases Test Quality by Targeting Subtle Defects in FinFETs and Emerging Processes
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Oct 26, 2016StarRC Technology Files Available in 28-nm PDK for Digital and Custom Designs
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Oct 24, 2016Platform Certified for Samsung's Second Generation of 10nm Process (10LPP)
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Oct 24, 2016Samsung and Synopsys Collaborate to Reduce FinFET Layout Time
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Oct 18, 2016No Impact on ZeBu Sales or Support
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Oct 12, 2016Enables Fast, Accurate Optical Simulation and Analysis of Automotive Lighting Products with Minimal Learning Curve for CATIA V5 Users
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Oct 6, 2016Streamlines Design and Analysis Capabilities for Photonic Devices in Semiconductor, Silicon Photonics and LED/OLED Applications
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Sep 22, 2016Scope of Collaboration Includes Innovations in Place-and-Route Optimization Technologies for High-Performance Designs
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Sep 21, 2016DesignWare Logic Libraries and Embedded Memories Accelerate Development and Qualification of Automotive SoCs
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Sep 21, 2016TSMC Certified Synopsys Custom, Digital and Signoff Tools for 16FFC Process
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Sep 20, 2016Compact Link Layer and PHY Supporting Bluetooth 5 Enable Efficient Wireless Connectivity with Secure Connections and Extended Reach
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Sep 19, 2016Synopsys Tools Enable Design and Safety Certification of Automotive, Industrial and Health Care SoCs Based on New ARMv8-R Architecture CPU
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Sep 19, 2016Joint Efforts Result in Multiple 7-nm Customer Tapeouts of DesignWare Logic Libraries and Embedded Memories
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Sep 19, 2016Certification includes digital, signoff and custom implementation tools from Galaxy Design Platform
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Sep 12, 2016DesignWare ARC SEM Security Processors with SecureShield Technology Protect Against Side-Channel Attacks, IP Theft and Data Breaches
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Sep 8, 2016Program Gives Synopsys Access to GLOBALFOUNDRIES' FDX Portfolio and Provides Customers with Tools that Support the Differentiated Features of FD-SOI
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Sep 8, 2016Solution Enables Maximum Benefits of Leading Process Technologies with High QoR
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Sep 8, 2016Superior Quality of Results and Throughput Drive the Fastest Product Ramp-up in Synopsys History
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Sep 7, 2016New IDE in Virtualizer Tool Set Integrates Advanced Modeling Tools to Speed Creation and Deployment of VDKs
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Sep 6, 2016Models Available Immediately to Semiconductor and EDA Industries Through a Synopsys Open-source License
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Sep 6, 2016Synopsys Experts, Users and Partners Will Present on Processor IP, Software and Programming Tools Optimized for Embedded Applications
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Aug 25, 2016Annual Competition Recognizes Student Achievements in Optical Design
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Aug 18, 2016eWBM Achieves First-Pass Silicon Success for Highly Secure Microcontroller with Synopsys Security IPHigh-Quality DesignWare Security IP Delivers Functionality Required to Protect Against Threats in IoT Applications
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Aug 17, 2016Q3 2016 Financial Highlights
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Jul 28, 2016Synopsys VDKs with New TriCore 1.6.2 Fast-Timed Model Deliver Speed and Accuracy for Real-Time Control Application Development Based on Infineon AURIX Microcontrollers
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Jul 27, 2016Native SystemVerilog VIP Features Built-in Coverage, Verification Planning, Protocol-Aware Debug and Source Code Test Suites
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Jul 21, 20165X Fewer Resources, 2X Performance Boost, Industry-Leading Fix Rate
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Jul 20, 2016Complete MIPI Display and Camera Interface IP Solutions Deliver High Bandwidth and Low Power for Mobile, Automotive and IoT SoCs
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Jul 19, 2016Brings Enhanced Design Productivity for TowerJazz's Advanced Analog/Mixed-Signal Process Technology
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Jul 13, 2016DesignWare IP Reduces USB Silicon Area by Up to 50 Percent with Near 0 W Standby Power Consumption for Longer Battery Life
- Jul 12, 2016New ATPG Engines Reduce Test Cost, Pattern Count by 25 Percent with Order of Magnitude Faster Runtime
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Jul 12, 2016Independent Functional Safety Evaluation Provides Highest Level of Safety-Related Tool Confidence
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Jul 12, 2016New ATPG Engines Substantially Reduce Test Pattern Count for Lower Test Cost
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Jul 12, 2016New ATPG Solution Reduces Pattern Count by up to 50% and Significantly Shortens ATPG Runtime
- Jul 11, 2016Strengthens Software Integrity Offering for Web and Mobile Applications, Automotive Systems and Chinese Market
- Jul 11, 2016Synopsys' Process Explorer and Raphael accurately simulate parasitic resistance of alternative metals and liner-barrier materials at the 7nm node and beyond
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Jul 6, 2016Adaptor Connects HAPS® Prototyping System with Juno ARM® Versatile™ Express Board to Speed SoC Prototyping and Integration for ARMv8-A based Designs
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Jun 27, 2016Synopsys Synplify Pro Software Delivers Superior Logic Synthesis Results for Users of Lattice Semiconductor Programmable Logic Devices
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Jun 21, 2016New Enhanced PCI Express IP Supports 16 GT/s and Latest Specification, Targeting High-Performance Applications
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Jun 16, 2016Latest Release Delivers New Capabilities for the Design of Manufacturable Photonic Integrated Circuits
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Jun 8, 2016Collaboration Delivers Best-In-Class Power, Performance and Area with IC Compiler II
- Jun 8, 2016DesignWare DDR4 IP Solution Enables Servers to Solve Complex Computation Problems Faster
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Jun 6, 2016Comprehensive Synopsys Solution Enables Accelerated Verification of Next-Generation SoCs including Automotive, Secure Connectivity and Smart Connected Products
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Jun 6, 20164X emulation performance enables fast software schedules for next-generation SoCs
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Jun 1, 2016DesignWare EV6x Family Integrates Scalar, Vector Processors and a Convolution Neural Network Engine for High Accuracy Vision Processing
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May 31, 2016RTL Congestion Analysis and Tight Correlation to Place-and-Route Shorten Design Schedules and Improve Predictability
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May 29, 2016Optimized Reference Implementation Using Galaxy Design Platform Available for New ARM Cortex-A73 Processor
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May 26, 2016
- May 25, 2016Generic Timer Module, CAN and FlexRay Models for Synopsys Virtualizer Development Kits Enable Early Software Development and Improve Software Quality
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May 24, 2016Subsystem Verification Solution Features Integrated Testbench Generation, Subsystem Level Test Suite, System Monitor, Coverage Checks, Performance Tests and Analysis
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May 23, 2016Enables Earlier Co-Optimization of Devices, Processes, Materials and Design
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May 19, 2016Samsung and Synopsys Collaborate to Deliver Custom Compiler-ready iPDK
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May 18, 2016Q2 2016 Financial Highlights
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May 17, 2016
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May 17, 2016Best-In-Class Power, Performance and Area Lead to Selection of IC Compiler II
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May 17, 2016Superior QoR Leads HiSilicon, Movidius to Select IC Compiler II
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May 11, 2016ASIL D Ready Certified ARC EM Processors with Safety Enhancement Package Accelerate ISO 26262 Certification Time by up to Six Months
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May 10, 2016Certification Provides Highest Degree of Safety-Related Confidence and Accelerates Functional Safety Qualification
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May 2, 2016Native SystemVerilog VIP Enables Ease of Development for HMC Solutions
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