Press Releases

Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.

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• Jul 27, 2005

  Silicon Logic Engineering Reduces Verification Development Time Using Synopsys' Reference Verification Methodology With VCS and Vera Solutions

  ASIC and System Developer Adopts Synopsys' Discovery™ Verification Platform for 90-Nanometer Chip
• Jul 19, 2005

  SMIC and Synopsys Announce Reference Design Flow 2.0

  Latest Flow for 0.13-micron Process Offers Advanced Floor Planning, Signal Integrity and Reliability Features
• Jul 12, 2005

  Synopsys Announces Production Support for New Oasis File Transfer Format

  New Specification Targets Increasing File Size, Need for Common Data Format
• Jun 27, 2005

  Renesas Technology Uses Synopsys' Galaxy Design Platform to Tape Out a 90-Nanometer Production Design

  Design for Yield Capabilities Enable Renesas Technology to Achieve Yield Goals in Wireless SoC
• Jun 22, 2005

  STMicroelectronics Cuts Verification Time in Half With Synopsys' VCS RTL Verification Solution

  Comprehensive Built-in Coverage Metrics in Synopsys' VCS® Solution Increase Verification Quality for STMicroelectronics' 90 Nanometer HDTV Processor Chip
• Jun 21, 2005

  TSMC, NVIDIA and VLSI Research to Keynote at 11th Annual Advanced Reticle Symposium

  Semiconductor Industry Executives Reflect on 40th Anniversary of Moore's Law
• Jun 15, 2005

  ARM Recipient of Synopsys Fifth Annual Tenzing Norgay Interoperability Achievement Award

  Collaboration on Interoperable Design Solutions to Benefit User Community
• Jun 14, 2005

  Synopsys Joins Si2
• Jun 14, 2005

  STARC Standardizes on Synopsys Innovations for 90-Nanometer Low Power Design in STARCAD-21 Flow

  Galaxy Platform Enables 50 Percent Power Savings in SoC Design
• Jun 14, 2005

  Synopsys Announces Industry-Wide Support for Liberty™ Composite Current Source (CCS) Library Models

  ARM, TSMC, Virage Logic and Library Technologies Gear Up to Support CCS-enabled 90nm Libraries
• Jun 10, 2005

  Synopsys' Hercules Physical Verification Suite Delivers Near Linear Performance Increase on More Than Fifty 64-Bit Intel® Xeon™ Processors

  Scalable Distributed Processing Reduces Physical Verification Processing Time from Days to Hours
• Jun 9, 2005

  Key Synopsys Low Power and DFM Technologies Support TSMC Reference Flow 6.0

  Synopsys' Galaxy Design Platform Provides Advanced Power Closure and Enhanced Yield Capabilities for Reference Flow 6.0
• Jun 8, 2005

  Synopsys and IBM Announce Availability of Fully Synthesizable PowerPC Cores and SystemC Models

  Synopsys to Deliver Complete System to Implementation Solution for Power Architecture Designs
• Jun 7, 2005

  Toshiba Adopts Synopsys IC Compiler for Use in Its SoC Research and Development Center

  IC Compiler Delivers 10 Percent Higher Speed With Faster Time-To-Results
• Jun 7, 2005

  Synopsys' DFM Environment Selected by Texas Instruments for Design and Process Development for the 65-Nanometer Node and Beyond

  Synopsys' PSM, Hercules PVS, Proteus OPC and TCAD Offer FastDFM Flow Turnaround Time
• Jun 6, 2005

  Synopsys Announces DesignWare IP Support for PCI Express 1.1 Specification

  DesignWare Digital Controller Cores and PHY IP Available Today for the PCI Express 1.1 Standard
• Jun 6, 2005

  Synopsys Enables Rapid Adoption of SATA Interface With DesignWare Verification IP

  Proven SATA Verification IP Lowers Risk and Speeds Verification for SoC Designers
• May 31, 2005

  Synopsys Advances VCS Solution by Adding Assertion IP Library and Native Testbench Support for SystemVerilog

  Latest Version of the VCS® Solution Speeds Standards-Based Verification by Unifying SystemVerilog and SystemC™ Languages in a Single Tool
• May 31, 2005

  Huawei Adopts Synopsys VCS Native Testbench to Accelerate Verification of Networking and Communications ASICs

  VCS® Native Testbench Technology and Comprehensive Coverage Enable Huawei to Achieve First-Silicon Success in Less Time
• May 25, 2005

  Synopsys Chairman and Chief Executive Officer to Speak At The SG Cowen 33rd Annual Technology Conference
• May 25, 2005

  IBM, Chartered Select Synopsys' Hi-Speed USB 2.0 and OTG PHYs for Their 90-nm Process Platform

  Synopsys DesignWare® PHY IP Enables Reliable USB Connectivity for IBM and Chartered Foundry Customers
• May 25, 2005

  Synopsys Provides Low-Power Reference Flow for IBM-Chartered 90-Nanometer Process Platform

  Complete RTL to Production-Ready GDSII Flow Speeds 90-nm Designs
• May 24, 2005

  Synopsys i-Virtual Stepper System for Photomask Qualification Implemented by UMC

  i-Virtual Stepper System Integrates Lithography Simulation and Automation to Deliver Improved Mask Turn-Around Time and Yield
• May 23, 2005

  Synopsys Unveils Latest Innovation in RTL Synthesis, Eliminating Wireload Models

  Design Compiler® 2005 Delivers Accurate Correlation to Post-Layout Timing for RTL Designers
• May 18, 2005

  Synopsys Announces CFO Transition

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