Cloud native EDA tools & pre-optimized hardware platforms
Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that UMC has adopted Synopsys TetraMAX® diagnostics to accelerate yield learning for designs that utilize the Synopsys DFT MAX scan compression automation solution. Rapid yield learning depends on the accuracy and efficiency of failure analysis, a manually intensive and time-consuming process of identifying the individual circuit in a design that could cause a device to fail. Using Synopsys TetraMAX diagnostics to perform this task automatically on DFT MAX-compressed scan patterns, UMC engineers were able to substantially decrease the time and effort required for failure analysis.
"As part of UMC's leading-edge manufacturing products and services, we are continuing to build upon our portfolio of robust rapid learning tools," said S. R. Sheu, product engineering director at UMC. "When evaluating the TetraMAX diagnostics, we observed high accuracy in identifying failure candidates. TetraMAX improves the accuracy and efficiency of failure analysis on highly compressed scan designs, making it a valuable addition to our suite of rapid yield learning tools."
Yield learning depends on the ability to gather cumulative failure statistics across wafer lots. Synopsys TetraMAX diagnostics automates this process by quickly and accurately identifying logic in a manufactured part that could contribute to mismatches between expected results generated by the TetraMAX automatic test pattern generator (ATPG) and observed responses of the device under test. Working with secure TetraMAX databases provided by their customers, foundries can collect precise diagnostics during volume production runs of designs that utilize DFT MAX scan compression to reduce test data volume and test application time. Because the Synopsys flow for collecting and diagnosing failure data is the same for both scan-compressed and regular scan test patterns, failure analysis teams using the TetraMAX diagnostics flow with regular scan can quickly ramp up designs using DFT MAX.
"Synopsys TetraMAX diagnostics is an essential ingredient of yield learning platforms for nanometer processes," said Bijan Kiani, vice president of Marketing, Synopsys Implementation Group. "Foundries like UMC and their fabless clientele benefit from diagnostic solutions that accelerate yield learning and reduce time spent debugging first-silicon and production parts."
About Synopsys
Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.
NOTE: Synopsys and TetraMAX are registered trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
SOURCE: Synopsys, Inc.
CONTACT: Sheryl Gulizia of Synopsys, Inc., +1-650-584-8635, or
sgulizia@synopsys.com; or Rachel Modena Barasch of MCA, Inc., +1-650-325-7547,
or rbarasch@mcapr.com, for Synopsys, Inc.
Web site: http://www.synopsys.com/