Cloud native EDA tools & pre-optimized hardware platforms
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Synopsys, Inc. (Nasdaq: SNPS) today announced its collaboration with SiMa.ai to bring its machine learning inference at scale to the embedded edge. Through this engagement, SiMa.ai has adopted key...
Highlights: DesignWare IP portfolio for GF 12LP+ solution includes USB4, PCIe 5.0, Die-to-Die HBI and 112G USR/XSR, 112G Ethernet, DDR5, LPDDR5, MIPI, OTP NVM and more Long-standing collaboration...
Highlights JLQ Technology has adopted Synopsys' broad DesignWare IP portfolio to reduce risk and speed time-to-market for next-generation mobile chipsets High-quality DesignWare IP for USB, MIPI,...
Highlights: Early adopters of Arm Cortex-A78 CPU and Mali-G78 GPU, as well as Arm Cortex-X Custom program partners of Cortex-X1 CPU, have successfully taped out SoCs for smartphones, laptops, and...
Highlights: DesignWare MIPI C-PHY/D-PHY IP interoperates with Synopsys' MIPI CSI-2, DSI/DSI-2, D-PHY, and verification IP for a complete camera and display IP solution The C-PHY/D-PHY delivers...
Highlights: Ultra-low power DesignWare Die-to-Die PHY IP delivers less than 1pJ/bit for optimal energy efficiency in hyperscale data centers Compact analog front-end enables reliable links up to...
Highlights: DesignWare PHY IP in development on TSMC's N5P process includes USB, DisplayPort, DDR, LPDDR, HBM, PCI Express, Ethernet, MIPI, and HDMI DesignWare Foundation IP on TSMC's N5P process...
Highlights: DesignWare IP portfolio for GLOBALFOUNDRIES 12LP FinFET process includes Multi-Protocol 25G, USB 3.0 and 2.0, PCI Express 2.0, DDR4, LPDDR4/4X, MIPI D-PHY, SD-eMMC, and Data Converters...
Highlights: Synopsys' Fusion Design Platform enables faster implementation with optimized PPA for Arm processors QuickStart Implementation Kit (QIK) using Arm Artisan Physical IP and POP IP,...
Highlights: DesignWare VESA DSC IP is compliant with the VESA DSC 1.1 and 1.2a standards, delivering the required 120Hz refresh rate for up to 10K resolutions Configurable IP scales up to 16...