Cloud native EDA tools & pre-optimized hardware platforms
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Highlights: Fully signoff-certified 14-nm runsets are available for DRC, LVS and metal fill Samsung Foundry-certified runsets include support for In-Design physical verification within Synopsys'...
Synopsys, Inc. (Nasdaq: SNPS) today announced it will report results for the first quarter fiscal year 2016 on Wednesday, Feb. 17, 2016, after the market close. A conference call to review the...
Highlights: HSPICE, FineSim and CustomSim 2016.03 release to include native environment for analog verification Eliminates the need for third-party analog design environments Streamlines...
Highlights: Synopsys' 10 Gbps DesignWare USB 3.1 controller and PHY passed all protocol, electrical and interoperability tests to become the first IP to achieve USB-IF certification DesignWare USB...
Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the industry's first verification IP (VIP) to support the Serial-attached SCSI (SAS) 24G standard, making it the first VIP product...
Highlights: Integrated, pre-verified IP subsystem includes the latest power-efficient DesignWare ARC EM9D and EM11D processors for highly-efficient DSP performance Integrated microDMA controller...
Highlights: Industry's most comprehensive USB Type-C IP solution includes USB-C 3.1/DisplayPort 1.3 PHYs, USB-C 3.1/DisplayPort 1.3 controllers with HDCP 2.2 content protection, and verification...
Highlights: 2X runtime speed up for faster extraction turnaround time (TAT) Simultaneous multi-corner (SMC) scalable to 200+ cores, with higher CPU efficiency 4X smaller disk usage through smarter...
Highlights: New IEEE 1801-2015 Unified Power Format (UPF) 3.0 standard enables the creation and reuse of interoperable system-level IP power models Platform Architect with support for IEEE...
Highlights: Single license includes everything required for library characterization and QA Simple multi-core licensing enables easy adaptation to constantly changing characterization workload...