Cloud native EDA tools & pre-optimized hardware platforms
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Highlights: Reprogrammable NVM IP on TowerJazz 180-nm process technology enables analog IC trimming and in-field calibration without additional masks or process steps Small footprint...
Highlights: New DesignWare Sensor and Control IP Subsystem incorporates the latest ARC EM processors with cache and DSP extensions operating at over 500 MHz in a 40-nm low-power process Optional...
Highlights: High-quality DesignWare USB 3.1 Device Controller IP reduces integration risk and accelerates availability of USB 3.1 SoCs USB 3.1 IP integrators can gain 2X faster data transfer...
Highlights IC Compiler II enables first-time working silicon for high-performance multimedia design in 40-nm technology 5X faster design implementation enables faster turn-around-time for large...
Highlights: SK Hynix cuts time-to-debug and overall debug time by integrating VC Apps into their internal verification and debug applications Resulting integration leverages industry-leading, open...
Highlights: Multi-year agreement provides Gowin FPGA users with Synopsys' Synplify Pro high-quality FPGA synthesis tool to produce high-performance, cost-effective FPGA designs Synplify Pro is...
Highlights: Fully qualified 28-nm signoff physical verification runsets are available from SMIC for DRC, LVS and metal fill Certified runsets enable SMIC and Synopsys' mutual customers to leverage...
Highlights: Marvell achieved silicon success for networking SoC using the multi-memory bus (MMB) processor in the Synopsys DesignWare STAR Memory System for embedded test and repair Reduced area...
Highlights: Extends the award-winning DesignWare STAR Memory System to support embedded flash memories Provides comprehensive test coverage and in-field diagnostics of the failure mechanisms...
Highlights: DFTMAX™ Ultra compression technology deliver 11X higher compression and reduced test time Higher test quality with shorter test time drove VIA's standardization on DFTMAX Ultra for...