Cloud native EDA tools & pre-optimized hardware platforms
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Highlights: Inomize selected Synopsys' DesignWare 56G Ethernet PHY IP for its next-generation fully integrated high-performance computing and software-defined radio communications SoC requiring...
Highlights: The RTL Architect product represents the industry's first physically aware RTL analysis, optimization, and signoff system built on a fast, multi-dimensional prediction engine for...
Highlights: Inspired by DeepMind's AlphaZero AI that mastered complex games like chess and Go, Synopsys' DSO.ai™ solution is able to autonomously search for optimization targets in very large...
Highlights: New ScanIP software module, Simpleware AS Ortho, uses automated algorithms to shorten segmentation time and produce accurate results significantly faster for medical image data A fully...
Highlights: Alphawave has replaced its legacy custom design tools with the Synopsys Custom Design Platform for development of high-speed multi-standard connectivity IP Flow migration and first...
Highlights: ML-driven implementation in IC Compiler II and Fusion Compiler enables Samsung to achieve up to five percent higher frequency and five percent lower power Predictive ML technologies...
Synopsys, Inc. (Nasdaq: SNPS) today announced that Aart de Geus, chairman and co-CEO, will speak at the Morgan Stanley Technology, Media and Telecom Conference on Mar. 5, 2020. This event will be...
Highlights: Uses trusted industry-standard SpyGlass engines for signoff confidence 10X reduction in noise leveraging machine learning technology Delivers 3X performance with half the memory for...
Synopsys, Inc. (Nasdaq: SNPS) today announced that it has entered into an accelerated share repurchase agreement (ASR) with JPMorgan Chase Bank, National Association to repurchase an aggregate of...
Highlights: Synopsys' DesignWare HBM2E IP in TSMC's N7 process provides up to 409 GBps aggregate memory bandwidth with low-power consumption and latency The HBM2E PHY has been verified using...