Synopsys - News Releases (Silicon IP) https://news.synopsys.com/ Synopsys Enhances DesignWare Memory Test and Repair Solution for Embedded MRAM https://news.synopsys.com/2018-10-30-Synopsys-Enhances-DesignWare-Memory-Test-and-Repair-Solution-for-Embedded-MRAM DesignWare STAR Memory System Maximizes Manufacturing Yield with New Algorithms to Mitigate Defects in Embedded MRAM-based Designs Tue, 30 Oct 2018 09:05:00 -0400 https://news.synopsys.com/2018-10-30-Synopsys-Enhances-DesignWare-Memory-Test-and-Repair-Solution-for-Embedded-MRAM Synopsys Announces Fastest, Most Power Efficient DDR5 and LPDDR5 IP Solutions https://news.synopsys.com/2018-10-24-Synopsys-Announces-Fastest-Most-Power-Efficient-DDR5-and-LPDDR5-IP-Solutions New DesignWare Memory Interface IP Targets AI, Automotive, and Mobile SoCs Wed, 24 Oct 2018 09:05:00 -0400 https://news.synopsys.com/2018-10-24-Synopsys-Announces-Fastest-Most-Power-Efficient-DDR5-and-LPDDR5-IP-Solutions Synopsys ASIP Designer Tool Speeds Development of Application-Specific Instruction-Set Processors for STMicroelectronics https://news.synopsys.com/2018-10-16-Synopsys-ASIP-Designer-Tool-Speeds-Development-of-Application-Specific-Instruction-Set-Processors-for-STMicroelectronics ASIP Designer Enables Rapid Architectural Exploration to Optimize Custom Processors for Power, Performance, and Area Tue, 16 Oct 2018 13:18:00 -0400 https://news.synopsys.com/2018-10-16-Synopsys-ASIP-Designer-Tool-Speeds-Development-of-Application-Specific-Instruction-Set-Processors-for-STMicroelectronics Synopsys and TSMC Collaborate to Develop Portfolio of DesignWare IP for TSMC N7+ FinFET Process https://news.synopsys.com/2018-10-03-Synopsys-and-TSMC-Collaborate-to-Develop-Portfolio-of-DesignWare-IP-for-TSMC-N7-FinFET-Process Successful Customer Tapeouts of DesignWare IP in N7+ Marks Significant Milestone of the Collaboration Wed, 03 Oct 2018 09:05:00 -0400 https://news.synopsys.com/2018-10-03-Synopsys-and-TSMC-Collaborate-to-Develop-Portfolio-of-DesignWare-IP-for-TSMC-N7-FinFET-Process Synopsys Delivers Automotive-Grade IP in TSMC 7-nm Process for ADAS Designs https://news.synopsys.com/2018-10-01-Synopsys-Delivers-Automotive-Grade-IP-in-TSMC-7-nm-Process-for-ADAS-Designs DesignWare IP in FinFET Processes Adopted by More Than a Dozen Companies Designing ADAS and Autonomous Driving SoCs Mon, 01 Oct 2018 09:05:00 -0400 https://news.synopsys.com/2018-10-01-Synopsys-Delivers-Automotive-Grade-IP-in-TSMC-7-nm-Process-for-ADAS-Designs