Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Feb 28, 2005
Galaxy™ Reference Flow Enables Faster Integration of ARM IEM Technology-Enabled IP for Low Power
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Feb 23, 2005
Reduces Development Time of LCD TV Driver SoC by Half
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Feb 14, 2005
VCS Native Testbench Migration Service Provides Access to Up to 5X Faster Verification Performance
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Feb 14, 2005
Powerful Testbench Automation in Synopsys Discovery™ Verification Platform Enables NetSilicon to Achieve First-Silicon Success
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Feb 14, 2005
Latest Release of VCS® Solution Extends Verification Performance and Effectiveness With New, Powerful Native Testbench Capabilities
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Feb 14, 2005
Industry Leaders to Demonstrate Immediate Benefits of Using SystemVerilog for Advanced Verification
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Feb 9, 2005
Advanced Hybrid Formal Verification Technology Awarded Top Honor in Design Verification Category
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Feb 7, 2005
Builds on Market Leading DesignWare Hi-Speed USB IP Solutions
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Feb 2, 2005
Customers Gain Access to EDA Industry's Most Extensive Linux Support
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Jan 31, 2005
Synopsys' ASIC Compatible Design Flow Including DC FPGA and Formality Products and Professional Services Now Supports Altera's Stratix II and HardCopy II Families
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Jan 26, 2005
VhdlCohen Publishes SystemVerilog Assertions Handbook
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Jan 24, 2005
Galaxy Platform's Multi-Voltage Flow Enables Toshiba to Realize Power-Efficient Design
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Jan 18, 2005
Major Commercial Foundry in China Endorses Synopsys Design Platforms
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Jan 11, 2005
Synopsys' Complete RTL to Silicon Flow Was Key to Designing Complex Mixed-Signal ASICs
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Dec 21, 2004
Strategic Supplier Award Cites Synopsys' Outstanding Solutions, Service and Support
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Dec 21, 2004
Unique Symbolic Simulation Speeds Verification for Artisan's New Low-Power, High-Density Metro Platform Memories
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Dec 20, 2004
First Foundry to Offer Yield-Enhancing AA-PSM Technology in Volume Production Environment
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Dec 13, 2004
Galaxy Delivers Fast, Accurate Signal Integrity Closure for Today's Largest, Most Complex Designs
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Dec 6, 2004
Over 25,000 DesignWare Library Users Gain Access to Verification IP for Next-Generation On-Chip Interconnect
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Dec 1, 2004
Outstanding Litigation to Be Settled at Closing
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Nov 30, 2004
Sasken Flow Delivers a Time to Market Advantage for Customers by Accelerating Design Convergence
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Nov 18, 2004
New Compute Platform Enables Customers to Address Tough Design Challenges
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Nov 2, 2004
Experienced IP Engineers to Help Meet Demand for Synopsys' DesignWare Mixed-Signal IP
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Nov 1, 2004
Synopsys' Industry Leading Standards-based IP Significantly Shortens Design Cycles and Helps to Reduce Risk
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Oct 27, 2004
Magellan Enables Rapid and Thorough Block-Level Verification
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Oct 26, 2004
SoCBIST Solution Enables More Transition Fault Detection and Higher QoR on High-Volume Printer Chips
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Oct 26, 2004
Galaxy 2004 Delivers Higher Test Quality Through Bridging Fault Support in TetraMAX DSMTest
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Oct 19, 2004
Top Customers Present Latest Success With Synopsys Test Solution at 12th Annual SIG Event
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Oct 18, 2004
Leading Combined Solution Includes Endpoint, Root, Dual Mode and Switch Port Cores
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Oct 18, 2004
Proteus' Unique Distributed Processing Accelerates Time to Yield
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Oct 12, 2004
Synopsys Extends Popular Liberty and SDC Open Source Formats
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Oct 11, 2004
Combination of Synopsys DFM Solutions and ISE TCAD Software Helps Chip Designers Improve Yield and Speed Time to Market
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Oct 4, 2004
Optimization and Analysis Solution Results in Improved Productivity, Fewer Re-Spins and Reduced Time to Market
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Oct 4, 2004
Reliable Timing Closure, Tight Tool Integration Key to Complex Designs' Success
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Sep 29, 2004
Synopsys' ASIC Strength Flow Ideal for Designers Prototyping With Complex Xilinx Devices