Press Releases
Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Dec 20, 2004First Foundry to Offer Yield-Enhancing AA-PSM Technology in Volume Production Environment
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Dec 13, 2004Galaxy Delivers Fast, Accurate Signal Integrity Closure for Today's Largest, Most Complex Designs
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Dec 6, 2004Over 25,000 DesignWare Library Users Gain Access to Verification IP for Next-Generation On-Chip Interconnect
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Dec 1, 2004Outstanding Litigation to Be Settled at Closing
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Nov 30, 2004Sasken Flow Delivers a Time to Market Advantage for Customers by Accelerating Design Convergence
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Nov 18, 2004New Compute Platform Enables Customers to Address Tough Design Challenges
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Nov 2, 2004Experienced IP Engineers to Help Meet Demand for Synopsys' DesignWare Mixed-Signal IP
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Nov 1, 2004Synopsys' Industry Leading Standards-based IP Significantly Shortens Design Cycles and Helps to Reduce Risk
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Oct 27, 2004Magellan Enables Rapid and Thorough Block-Level Verification
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Oct 26, 2004SoCBIST Solution Enables More Transition Fault Detection and Higher QoR on High-Volume Printer Chips
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Oct 26, 2004Galaxy 2004 Delivers Higher Test Quality Through Bridging Fault Support in TetraMAX DSMTest
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Oct 19, 2004Top Customers Present Latest Success With Synopsys Test Solution at 12th Annual SIG Event
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Oct 18, 2004Leading Combined Solution Includes Endpoint, Root, Dual Mode and Switch Port Cores
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Oct 18, 2004Proteus' Unique Distributed Processing Accelerates Time to Yield
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Oct 12, 2004Synopsys Extends Popular Liberty and SDC Open Source Formats
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Oct 11, 2004Combination of Synopsys DFM Solutions and ISE TCAD Software Helps Chip Designers Improve Yield and Speed Time to Market
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Oct 4, 2004Optimization and Analysis Solution Results in Improved Productivity, Fewer Re-Spins and Reduced Time to Market
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Oct 4, 2004Reliable Timing Closure, Tight Tool Integration Key to Complex Designs' Success
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Sep 29, 2004Synopsys' ASIC Strength Flow Ideal for Designers Prototyping With Complex Xilinx Devices
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Sep 20, 2004NanoSim Speeds Analog-RF Circuit Verification Throughput by 10X
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Sep 17, 2004Magma's Patent Assertion Letter to Synopsys Triggers Response
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Sep 14, 2004Proteus OPC Decreases Turn Around Time Using Distributed Processing
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Sep 14, 2004Tighter Links Between Software and Manufacturing Accelerate Time to Yield
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Aug 31, 2004Galaxy and Discovery Platforms, IP and Professional Services Included in Multi-Million Dollar Agreement
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Aug 30, 2004Multi-Year License Agreement Gives Samsung Access to Broad Portfolio of DesignWare IP
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Aug 30, 2004Silicon-Proven PHY Cores Expand Industry-Leading DesignWare USB IP Portfolio
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Aug 23, 2004Tested, Integrated IP Reduces Risk, Shortens Time to Market for PCI Express Designers
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Jul 19, 2004Star-RCXT Delivers Silicon-Accurate Parasitic Extraction for Advanced Technologies
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Jul 19, 2004DesignWare PCI Express PHY Area 50% Smaller Than Competing Solutions
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Jun 29, 2004Advanced EDA Tools, IP and Training Will Help the IT-SoC Promotion Group of KIPA Achieve Its Technology Leadership Mission
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Jun 28, 2004Synopsys Responds to Customer Demand by Opening Popular Saber MAST Language
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Jun 22, 2004Dr. Aart de Geus Recognized Among Top Silicon Valley Innovators
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Jun 21, 2004Integration of Synopsys System Studio and Virtio Software Models to Reduce SoC Design Cycle; Synopsys Makes Equity Investment in Virtio
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Jun 21, 2004Technical Seminar Shows Users How to Achieve 2X Power Reduction and Power Integrity Sign-off
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Jun 14, 2004DesignWare IP Speeds Development of Ethernet Controller with PCI Express Interface
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