Press Releases

Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.

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• Mar 28, 2006

  Silicon Valley Technical Institute Receives Charles Babbage Grant From Synopsys

  Institute to Receive World-Class Tools for Advancing Education in Electronic Design
• Mar 27, 2006

  STARC Adopts IC Compiler to Boost Efficiency of Production Flow

  Enhanced STARCAD-21 RTL-to-GDSII Production Flow Ready for Deployment at Major Japanese Semiconductor Companies
• Mar 22, 2006

  Synopsys to Hold Investor Day on March 28, 2006
• Mar 22, 2006

  Cypress Streamlines on Synopsys Galaxy Design Platform

  Galaxy Design Platform Delivering Predictable Time-to-Results Through Sign-off Correlation to Silicon
• Mar 21, 2006

  Synopsys Provides Electronic Design Automation Solution for Sun Microsystems' UltraSPARC T1 Processor

  Processor Implementation and Verification Enabled by Powerful Tools From Synopsys' Galaxy and Discovery Platforms
• Mar 20, 2006

  Synopsys Delivers First Complete SystemVerilog Design and Verification Flow

  More Than 150 Companies Worldwide Have Adopted Synopsys' SystemVerilog Solutions to Create Today's Hottest Electronics Products
• Mar 20, 2006

  Synopsys Announces EDA Industry's First Verification IP Library for SystemVerilog With Methodology Support

  VCS Verification Library Enables Rapid Adoption of SystemVerilog With Full Support of the Verification Methodology Manual (VMM) for SystemVerilog
• Mar 15, 2006

  ATI Deploys Synopsys' Star-RCXT for Silicon-Accurate Parasitic Extraction

  Sign-Off Flow With Star-RCXT Delivers High Predictability
• Mar 8, 2006

  Synopsys Wins Coveted IBM Beacon Award for Synthesizable PowerPC IP and Design Services

  DesignWare® Library Core's Portability and Accessibility Cited by IBM in Award Presentation
• Mar 6, 2006

  Synopsys Chief Financial Officer to Speak at the Deutsche Bank Technology Conference on March 15, 2006
• Mar 2, 2006

  ADVISORY/ Synopsys to Highlight Complete Wireless USB, PCI Express, SATA and Mobile Storage IP Solutions at Intel Developers' Forum 2006
• Feb 27, 2006

  Synopsys Chief Financial Officer to Speak at the Morgan Stanley Semiconductor and Systems Conference on March 7, 2006
• Feb 27, 2006

  Synopsys Introduces Pilot Design Environment

  Production-Ready Environment Integrates Proven RTL-to-GDSII Flow With New Utilities to Improve Design Productivity and Tapeout Predictability
• Feb 27, 2006

  Synopsys, IBM, Chartered and ARM Collaborate to Extend Low-Power 90nm Reference Flow

  Flow Supports IC Compiler for Common Platform's Low-Power Process
• Feb 22, 2006

  16 Synopsys Technologists Recognized for Leadership in Creation of SystemVerilog Standard

  IEEE Working Group Chairman Awards and Certificates of Recognition Presented to Synopsys Engineers
• Feb 15, 2006

  Synopsys Posts Financial Results for First Quarter of Fiscal 2006
• Feb 15, 2006

  Synopsys IC Compiler Enables STMicroelectronics to Speed the Tapeout of Ultra-Low-Power Nomadik Multimedia Processor

  Synopsys Galaxy Design Platform Delivers Complete Flow for Ultra-Low-Power Design
• Feb 8, 2006

  ADVISORY/Synopsys to Deliver Keynote, Lead SystemVerilog Tutorials at DVCon 2006
• Feb 8, 2006

  Synopsys' Pioneer-NTB SystemVerilog Testbench Automation Wins IEC DesignVision Award

  SystemVerilog Testbench Automation Technology Awarded Top Honor in Design Verification Category
• Feb 6, 2006

  Synopsys' New Designware USB 2.0 nanoPHY IP to Cut Power and Size in Half

  Enables Longer Battery Life and Lower Cost for Mobile and High-Volume Consumer Products
• Feb 1, 2006

  Synopsys Announces Earnings Release Date and Conference Call Information for the First Quarter Fiscal Year 2006
• Jan 25, 2006

  Synopsys Senior Vice President to Speak at the Merrill Lynch IT Services and Software CEO Conference on February 1, 2006
• Jan 25, 2006

  ARM-Synopsys Verification Methodology Manual for SystemVerilog Endorsed by Leading Japanese Semiconductor Companies

  Japanese-Language Edition of the Manual to Be Published by CQ Publishing
• Jan 24, 2006

  Synopsys DesignWare IP to Enable Next-Generation PCI Express 2.0 Products

  Synopsys Is First to Deliver PCI Express Gen II Digital IP for Increased Bandwidth in Networking, Embedded and Computer Applications
• Jan 10, 2006

  eInfochips Offers SystemVerilog Migration Services from Legacy Verification Environments

  IP-Enabled Services Firm Joins Synopsys' SystemVerilog Catalyst Program
• Jan 4, 2006

  Synopsys Chairman and Chief Executive Officer to Speak at the Needham & Company Eighth Annual Growth Conference
• Dec 22, 2005

  Synopsys to Appoint Brian Beattie as Chief Financial Officer
• Dec 19, 2005

  AMCC Speeds Verification Using Synopsys' VCS Solution With SystemVerilog and e Testbench Migration Service

  AMCC Deploys SystemVerilog Verification Environment With Synopsys' VCS® Native Testbench and Reference Verification Methodology
• Dec 19, 2005

  Synopsys' PSM Technology Adopted by NEC Electronics for 65-nm Production and Beyond

  PSM Technology Enhances Lithography Resolution and Yield for High-Performance Products
• Dec 14, 2005

  Synopsys Expands Mixed-Signal IP Portfolio With Interface Cell Libraries Featuring DDR2 SDRAM I/Os

  Provides Complete Set of Standards-Based I/O Libraries for General Purpose and High-Performance Applications
• Dec 7, 2005

  Synopsys Completes Acquisition of HPL Technologies, Inc.
• Dec 7, 2005

  Synopsys Offers First Certified TSMC 90-Nanometer USB 2.0 OTG PHY IP

  DesignWare PHYs for Hi-Speed USB 2.0 and Hi-Speed USB OTG Developed with TSMC's Production-Proven 90-nm Libraries
• Dec 6, 2005

  Synopsys' Sentaurus Calibration Library Incorporates Varian Semiconductor Ion Implantation Process Data for Highly Predictable TCAD Simulation

  Increased Predictability of Manufacturing Process through TCAD Lowers Product Development Cost and Time
• Nov 30, 2005

  Synopsys Posts Financial Results for Fourth Quarter and Full-Year Fiscal 2005
• Nov 28, 2005

  Agere Systems Accelerates Tapeout of High-Performance SOC with Synopsys IC Compiler

  IC Compiler Fits Easily in the Agere Flow, Delivers Higher Performance
• Nov 21, 2005

  Synopsys and UMC Partner on Low Power 90-nm Reference Design Flow to Deliver Faster Time to SoC Success

  Reference Design Flow Features Low Power Management and Design-for-Manufacturing Automation Capabilities
• Nov 8, 2005

  Synopsys' TetraMAX ATPG Delivers Significant Productivity Gains for Designers

  TetraMAX® ATPG Performance Speedup Combined with a New Waveform Debugger Streamline Test Pattern Generation for Complex Designs
• Nov 8, 2005

  ADVISORY/Synopsys Announces Earnings Release Date and Conference Call Information for the Fourth Quarter and Fiscal Year 2005
• Nov 7, 2005

  Synopsys Leads Industry With New Nanometer Modeling Technology

  Composite Current Source Model First to Combine Timing, Noise and Power
• Nov 7, 2005

  Synopsys Galaxy Design Platform Now Supports Composite Current Source Modeling Technology

  Designers Benefit from Enhanced Productivity and Reduced Design Margins
• Nov 2, 2005

  Synopsys Integrates Solution-Soft's Advanced GDSII and MEBES Compression Solutions With CATS

  Combined Technology Can Read, Write and Provide On-The-Fly View of Compressed Files
• Nov 2, 2005

  Synopsys to Highlight Liberty and Composite Current Source at 16th EDA Interoperability Developers' Forum
• Nov 1, 2005

  Genesis Microchip Adopts Synopsys' DFT MAX Adaptive Scan

  DFT MAX Achieves 90% Test Data Volume Reduction for Flat Display TV Controller
• Oct 31, 2005

  Exar Triples Verification Productivity Using Synopsys' VCS Solution With SystemVerilog Testbench Automation

  Exar Develops and Deploys Advanced SystemVerilog Verification Environment and Reference Model with VCS® Native Testbench Technology
• Oct 26, 2005

  Synopsys Senior Vice President to Speak at the Deutsche Bank Securities Global Semiconductor & Semi Capital Equipment Conference on November 4, 2005
• Oct 26, 2005

  Synopsys Senior Vice President to Speak at the Morgan Stanley Software Services, Internet & Networking Conference on November 3, 2005
• Oct 24, 2005

  TSMC Adopts Synopsys TetraMAX for Yield Diagnostics

  TetraMAX Diagnostics Enable TSMC to Accelerate Yield Ramp on Deep Submicron Designs
• Oct 19, 2005

  Cedar Point Utilizes Synopsys' VCS Native Testbench Technology to Speed Time to Market for Safari C(3) VoIP Switch

  Advanced Testbench Techniques Critical for Multi-Protocol Verification Environment at Chip and System Levels
• Oct 19, 2005

  StarGen Verifies Advanced Serial Switched Interconnect Chips With Synopsys' VCS, VERA and VCS Verification Library Solutions

  Project Methodology Leverages Assertions, Functional Coverage, Constrained-Random Stimulus Generation and PCI Express® Verification IP
• Oct 17, 2005

  Synopsys Extends TCAD Leadership With the Introduction of Sentaurus

  Sentaurus Sets New Standard in TCAD Simulation Capabilities for Semiconductor Process, Device, Circuit and System Analysis, and Parametric Yield Optimization

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