Press Releases
Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Jan 15, 2019Latest Product Release Bolsters Software Integrity Offering for Enterprise Security Teams
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Jan 14, 2019Silicon-Proven DesignWare IP for PCI Express 4.0 Delivers 16 GT/s Data Transfer Rate to Meet AI Inference Throughput Requirements
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Jan 9, 2019IC Validator Verifies Innovium's Flagship 12.8Tbps Network Switch
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Dec 19, 2018Manufacturing Challenges and Need for Ultra-low Power Drive Extensions to Liberty and Interconnect Technology Standards
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Dec 17, 2018RSoft Photonic Component Design Suite 2018.12 Now Available
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Dec 10, 2018Synopsys and imec Demonstrate Accelerated Modeling of Innovative Complementary FET (CFET) TechnologyPartnership Aims to Reduce Parasitic Variation at Sub-3nm Processes
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Dec 5, 2018Q4 2018 Financial Highlights
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Nov 8, 2018Synopsys Fusion Technology and Artificial Intelligence Solution Recognized with Product of the Year Awards
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Nov 7, 2018Accelerates InP-based PIC Design and Production
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Nov 6, 2018Innovative RTL-to-GDSII Product Redefines IC Design through Fusion of Synthesis and Place-and-Route
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Nov 6, 2018Design Compiler NXT Boosts Runtime by 2X, QoR by 5 Percent, and Provides Support Down to 5nm and Beyond
Oct 30, 2018DesignWare STAR Memory System Maximizes Manufacturing Yield with New Algorithms to Mitigate Defects in Embedded MRAM-based Designs-
Oct 29, 2018SpyGlass DFT ADV Guides Design Changes for Improved ISO 26262 Metrics
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Oct 29, 2018Accelerates Achieving Test Goals While Meeting Power, Performance, and Area Targets
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Oct 24, 2018New DesignWare Memory Interface IP Targets AI, Automotive, and Mobile SoCs
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Oct 23, 20183X Faster Analog Simulation and New Fusion Technologies Accelerate AMS Design
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Oct 23, 2018New Fusion Technologies Reduce Time to Analog Design Closure
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Oct 23, 2018Latest Release Accelerates Verification of Large, Advanced-node Post-layout Analog Designs
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Oct 17, 2018Expertise and Market-Leading Position in Emulation Being Brought to Bear, in Partnership with Lockheed Martin and Analog Devices
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Oct 16, 2018Synopsys' Design, Verification, Software Integrity, and IP Solutions Enable Power, Performance, Area, and Security Required for Server and Networking Products Based on Arm Neoverse IP
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Oct 16, 2018ASIP Designer Enables Rapid Architectural Exploration to Optimize Custom Processors for Power, Performance, and Area
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Oct 15, 2018In Addition, Despite the Rise in Open Source Software (OSS) Adoption, 30 Percent of Organizations Still Lack an Inventory Management Process for OSS
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Oct 15, 2018Enables Architecture Exploration for Advanced AI SoCs to Meet Optimal Performance and Power Goals Targeted for Cloud and Edge Applications
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Oct 3, 2018Synopsys Recognized for Collaboration on Interface IP, Joint Development of 5-nm Design Infrastructure, Joint Development of VDE Cloud Solution, and Joint Delivery of WoW Design Solution
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Oct 3, 2018TSMC and Synopsys Collaboration Delivers Design Flow for TSMC's WoW and CoWoS Packaging Technologies
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Oct 3, 2018TSMC and Synopsys Collaboration Streamlines Cloud-based IC Design
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Oct 3, 2018Successful Customer Tapeouts of DesignWare IP in N7+ Marks Significant Milestone of the Collaboration
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Oct 2, 2018Latest Iteration of the Building Security In Maturity Model Reflects Software Security Initiatives of 120 Firms Over the Past Decade
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Oct 1, 2018Certification Delivers Proven Production-ready Flow for Advanced Customer Designs
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Oct 1, 2018DesignWare IP in FinFET Processes Adopted by More Than a Dozen Companies Designing ADAS and Autonomous Driving SoCs
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Sep 26, 2018RB Discusses Building Secure, High-quality Software for Internet of Things (IoT) Applications
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Sep 24, 2018Development of SMART Photonics PDK for Synopsys' PIC Design Suite Enables a Complete and Seamless InP-Based Design Flow
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Sep 18, 2018Synopsys Fusion Technology Enables Superior Power, Performance, Area for AI Chip Design
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Sep 18, 2018Silicon-Proven DesignWare IP Enables Ultra-High-Definition 8K Video and High-Fidelity Audio in Multimedia SoCs
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Sep 12, 2018Enabling AI Chip Design from the Data Center to the Edge
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Sep 12, 2018Latest Release Innovates Solutions for Optical Engineering Productivity and Design Manufacturability
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Sep 11, 2018DesignWare tRoot HSM IP for iSIM and Truphone Io3 Managed Services Deliver Secure Mobile Connectivity to Cellular IoT Devices
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Sep 10, 2018HPC Design Kit for EV6x Delivers Up to 39 Percent Power Reduction Within the Same Area for SoCs Requiring Advanced AI Processing
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Sep 5, 2018Comprehensive Security IP Solution with Hardware Root of Trust Delivers High Level of Protection During SoC Power Off, Power Up, and Runtime
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Aug 28, 2018Participants Will Discuss Processor IP, Software, and Programming Tools to Address Design Challenges in Artificial Intelligence, Automotive Safety, IoT, and Embedded Vision Applications
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Aug 27, 2018VC Formal Regression Mode Accelerator Enables Successively Faster Formal Convergence
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Aug 22, 2018Q3 2018 Financial Highlights
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Aug 15, 2018Synopsys Manufacturing, IP, and Design Implementation Technologies Enable Industry's Only Complete DTCO Flow
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Aug 13, 2018Annual Competition Recognizes Student Achievements in Optical Design
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Jul 31, 2018Continuously detects and verifies web app vulnerabilities at the speed of DevOps, identifies and tracks sensitive data for compliance
Jul 24, 2018DesignWare 56G Ethernet PHY Addresses the Reach and Performance Requirements of Next-Generation Leaf-Spine Network Architectures-
Jul 3, 2018Parties Settle All Current Mentor Graphics Patent Litigation
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Jun 26, 2018Automotive-Ready DesignWare ARC EM6 Safety Island, EV Vision Processor, Ethernet QoS Controller, and Embedded Memory Test and Repair IP Accelerate ISO 26262 Certification of Radar Chipset
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Jun 22, 20185X Productivity Gains in Power Integrity Analysis and Fixing within IC Compiler II
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Jun 22, 2018Samsung and Synopsys Release 7LPP Custom Design Reference Flow
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Jun 21, 2018Fusion Technology Delivers 40% Runtime Reduction on a 6-million-instance Complex Multi-Voltage Chip
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Jun 21, 2018Emulation and Rail-driven Power Analysis Delivers Unparalleled Efficiency and Quality-of-Results in Design Closure
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Jun 18, 2018Emulation Market Leader Delivers 2X Faster Emulation over Legacy Systems
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Jun 18, 2018Panel Topics Include Challenges, Ecosystem Enablement, and ISO 26262 Compliance for Automotive Designs
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Jun 13, 2018Synopsys Design Platform Certified using 64-bit Arm Cortex-A53 Processor
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Jun 13, 2018IC Validator's Massively Parallel Architecture and Samsung Foundry's Runsets Accelerate Physical Signoff for Mutual Customers
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Jun 13, 2018Version 2018.06, Now Available, Reduces Design Iterations Needed to Meet Lit Appearance and Regulatory Requirements
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Jun 12, 2018Version 8.6, Now Available, Adds Tolerance Manager for Fast, Accurate Illumination System Tolerance Calculations
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Jun 5, 2018Latest Release of PrimeTime with AI-enhanced Power Recovery Demonstrates 5X Faster Time-to-Results with Industry-best Quality-of-Results
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May 31, 2018Synopsys Design and Verification Platforms and DesignWare Interface IP Enable Optimized PPA and Faster Time-to-Market
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May 31, 2018Enhanced Tools Reduce Computation, Memory, and Bandwidth Requirements for Mapping Neural Network Graphs to DesignWare EV6x Vision Processor IP
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May 30, 2018Collaboration Enables 2X FineSim Pro FastSPICE Speed-up for NAND Flash Circuit Simulation
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May 23, 2018Q2 2018 Financial Highlights
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May 22, 2018Silicon-proven Reference Flow Provides Quality-of-Results and Time-to-Results Advantage for High-performance, Low-power Applications
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May 17, 2018DesignWare EV6x Processors with Safety Enhancement Package Accelerate ISO 26262 SoC-level Functional Safety Certifications for AI-enabled Automotive SoCs
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May 15, 2018The findings show a third of the audited codebases that contained Apache Struts also had the vulnerability that resulted in the Equifax breach
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May 14, 201814LPP Certification Enables High-Performance Physical Signoff for Mutual Customers
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Apr 30, 2018Close Collaboration Enables Designers to Benefit from the Process' Power, Performance, and Area for the Most Advanced Designs
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Apr 30, 2018Synopsys Design Platform Delivers High-performance, High-density Designs
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Apr 30, 2018DesignWare Logic Library, Embedded Memory and OTP NVM IP for TSMC 22ULP and 22ULL Processes Improves Power Consumption for Digital Home, IoT, and Mobile Devices
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Apr 25, 2018Survey Reveals Only Half of CI/CD Workflows Include Application Security Testing Elements
Apr 17, 2018HAPS-80D Delivers Out-of-the-Box Design Interaction for High-performance Prototyping-
Apr 16, 2018Design and Verification Solutions to be Shared at Worldwide Arm-Synopsys Workshops
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Mar 21, 2018Acquisition Also Adds a Team of Highly Experienced R&D Engineers to Accelerate High-Speed SerDes IP Development
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Mar 20, 2018Independent Analyst Firm Recognizes Synopsys for Completeness of Vision and Ability to Execute in the Application Security Testing Market
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Mar 20, 2018Certification for Tools and Flows Bolsters Synopsys Position as #1 EDA Provider for Automotive Semiconductor Component and System Designs
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Mar 20, 2018Synopsys Accelerates Development of Renesas R-Car V3H SoC that Achieves Cutting-edge Computer VisionSynopsys Design Platform Enables Highly Power-Efficient R-Car SoC Hardware Accelerator
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Mar 20, 2018Autonomous Driving, Scalable Blockchain, and Virtual Network Functions Orchestration Among Groundbreaking Open Source Projects
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Mar 19, 2018First Product Available from Exclusive Partnership with ANSYS that Brings Power Integrity and Reliability Signoff Technology Earlier in the Design Flow
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