Press Releases

Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.

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• May 12, 2005

  Synopsys' Hi-Speed USB OTG IP is First and Only Complete IP Solution to Earn Hi-Speed USB OTG Certification

  Certified Digital and PHY IP Gives Designers the Flexibility to Choose From 130nm or 90nm Processes
• May 11, 2005

  Synopsys Closes Nassda Acquisition

  Litigation Successfully Concluded
• May 10, 2005

  Synopsys Delivers Industry's First Single-Vendor PCI Express IP Solution to Pass PCI-SIG Compliance

  Leading Digital Core Combined With High-performance PHY Lowers Risk for SoC Designers
• May 10, 2005

  Faraday Verifies Complex CPU Cores With Synopsys' VCS and Vera Verification Solutions

  Advanced Coverage and Testbench Technologies in the Synopsys Discovery™ Verification Platform Enable Robust Validation of Faraday's Processor IP
• May 9, 2005

  Synopsys Introduces PrimeRail for Power Network Sign-Off

  Extending Sign-off in the Galaxy™ Design Platform to Voltage-Drop and EM Analysis
• May 5, 2005

  Synopsys Owns Inventions in Magma Litigation

  Company Releases van Ginneken Deposition
• May 4, 2005

  Synopsys Announces Earnings Release Date and Conference Call Information for the Second Quarter of Fiscal Year 2005
• Apr 26, 2005

  Synopsys DesignWare IP Enables Full-Service SoC Design Foundry for Global UniChip

  Full Portfolio of Synopsys' IP Expands GUC's Deep Submicron Offering
• Apr 20, 2005

  Top Layer Networks Uses Synopsys' Testbench Automation Solution to Verify Network Security Chip

  Vera Tool Offers the Thorough Verification Necessary for Mission-Critical Network Protection
• Apr 20, 2005

  CreVinn Adopts Synopsys' VCS Native Testbench to Accelerate ASIC Development

  VCS Native Testbench Helps CreVinn Speed Testbench Development and Performance to Deliver a Higher Level of Verification

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