Cloud native EDA tools & pre-optimized hardware platforms
MOUNTAIN VIEW, Calif., Nov. 24 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the release of a broad range of data converter IP solutions for 40-nanometer (nm) process technologies. The IP is targeted at broadband wireless communications, wired communications, and video designs requiring high-performance, ultra-low power consumption and very compact area. With this latest addition, Synopsys' DesignWare® Data Converter IP portfolio now offers more than 100 data converter IP products comprised of Oversampling Sigma-Delta, Pipeline, and, SAR analog-to-digital converters (ADCs), Current Steering digital-to-analog converters (DACs) and General Purpose ADCs and DACs. By providing a broad portfolio of silicon-proven, high-quality data converter IP solutions that are backed by technical experts in major geographical regions worldwide, Synopsys helps designers lower integration risk, speed time-to-market and achieve first pass silicon success for their system-on-chip (SoC) designs.
"Synopsys is well trusted in the design community for delivering silicon-proven, advanced data converter IP solutions," said Tommy Aizawa, vice president of strategic marketing for Kawasaki Microelectronics (K-Micro). "Their high-quality products, engineering expertise and technical support are critical to helping us bring highly differentiated products to the market faster and with less risk. This enables our customers to deliver high performance network devices with unique features that are specifically targeted for home networking and access devices. Our established relationship with Synopsys through the years has enabled us to have access to a strong roadmap that we can rely on for future product developments."
The DesignWare Data Converter IP solutions meet the needs of a broad range of applications:
These full-featured data converters internally generate the required references and include additional features such as a highly flexible analog interface which simplifies the connection with RF and other transceivers, eliminating the need for external components. These elements help designers reduce silicon costs and significantly simplify the integration of the IP into an SoC.
"With more than 12 years of delivering analog IP for a broad range of applications, Synopsys continues to invest significantly in providing products that not only support the latest technologies but are also unmatched in performance, power dissipation and area," said John Koeter, vice president of marketing for the Solutions Group at Synopsys." By offering DesignWare Data Converter IP solutions that are silicon-proven in a wide range of customer designs across a variety of process technologies, Synopsys enables designers to easily embed the analog IP into their SoCs with less risk and quickly deliver differentiated products to the market."
The DesignWare Sigma-Delta ADCs, Current Steering DACs, Video DACs and General Purpose ADCs and DACs in the 40-nm process are expected to be available in Q1 2010. The DesignWare Data Converter IP solutions are currently available in leading foundries and advanced technology processes from 180-nm to 65-nm. For more information on the DesignWare Data Converter IP solutions, please visit: http://www.synopsys.com/dataconverters.
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven interface and analog IP solutions for system-on-chip designs. Synopsys' broad IP portfolio delivers complete connectivity IP solutions consisting of controllers, PHY and verification IP for widely used protocols such as USB, PCI Express, DDR, SATA, HDMI, MIPI and Ethernet. The analog IP family includes Analog-to-Digital Converters, Digital-to-Analog Converters, Audio Codecs, Video Analog Front Ends, Touch Screen Controllers and more. In addition, Synopsys offers SystemC transaction-level models to build virtual platforms for rapid, pre-silicon development of software. With a robust IP development methodology, extensive investment in quality and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware. Follow us on Twitter at http://twitter.com/designware_ip.
Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
This press release contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934, including Synopsys' expectations of the benefits and availability of DesignWare Sigma-Delta ADC, Current Steering DAC, Video DAC and General Purpose ADCs and DAC in the 40-nm process and the DesignWare Data Converter. These statements are based on current expectations and beliefs. Actual results could differ materially from these statements due to risks and uncertainties including, but not limited to, engineering difficulties, unforeseen difficulties in completing the commercial release of the solution and other risks as identified in the section of Synopsys' quarterly report on Form 10-Q for the fiscal quarter ended July 31, 2009, titled "Risk Factors." Statements included in this release are based upon information known to Synopsys as of the date of this release, and Synopsys assumes no obligation to publicly revise or update any forward-looking statement for any reason.
Synopsys and DesignWare are registered trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
Editorial Contacts: Sheryl Gulizia Synopsys, Inc. 650-584-8635 email@example.com Karen Do MCA 650-968-8900 x111 firstname.lastname@example.org
SOURCE: Synopsys, Inc.
Web site: http://www.synopsys.com/