Cloud native EDA tools & pre-optimized hardware platforms
MOUNTAIN VIEW, Calif., July 20 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the DesignWare® minPower Components, a new IP product that is an integral part of the Synopsys Eclypse™ Low Power Solution. The DesignWare minPower Components dramatically reduce power in datapath logic compared to traditional power optimization methods. By using the DesignWare minPower Components, leading wireless, networking and DSP companies achieved power reduction of up to 48 percent in datapath logic (see Table for results).
"Optimizing the power consumption of datapath circuits in mobile applications can significantly extend battery life because these blocks are often on, even in standby mode," said John Koeter, vice president of marketing for the Solutions Group at Synopsys. "Our customers have achieved an additional 7 to 48 percent reduction in power for these circuits."
"As the high speed networking market evolves to support another 10X increase in data rates, power dissipation has become an important issue in the adoption of next-generation technologies," said Jag Bolaria, senior analyst at The Linley Group. "To be competitive, chip manufacturers need to optimize power dissipation in the datapath. Synopsys' DesignWare minPower Components include innovative techniques that address this problem - enabling designers to further reduce power consumption at advanced data rates."
Today's conventional techniques do not address reducing specific power elements such as glitch power in deep logic levels and dynamic power in high-performance datapath pipelines. The DesignWare minPower Components offer unique, power-optimized datapath architectures that enable the DC Ultra™ synthesis tool to automatically generate circuits that suppress switching activity and glitches, reducing both dynamic and leakage power for mobile devices and high-performance applications. Based on the actual switching activities, transition probabilities, available standard cells and analysis of possible configurations, the DesignWare minPower Components architectures are automatically configured by DC Ultra to implement the optimal structure with the lowest power consumption. In addition to the automatically inferable components, the DesignWare minPower Components also include more than 40 instantiable components that incorporate low power design techniques such as enhanced clock gating, built-in datapath gating and patented data-tracking pipeline management technology to reduce power consumption.
The DesignWare minPower Components are tightly integrated with the Synopsys Galaxy™ Implementation Platform, which enables significant optimization of a design's total power compared to existing flows. The unique architectures in the DesignWare minPower Components allow high-level datapath structures to be automatically optimized based on power costing and switching activities. Applications with datapath circuits that have a high percentage of active time, such as wireless receivers, audio/video processors, CPUs, media processors, and signal processing blocks for high-performance networking and storage, are ideal candidates for the DesignWare minPower Components.
The table below shows the overall improvements in area and power in datapath circuits as recorded from initial customers designing wireless connectivity and high-performance networking applications. While the total chip power reduction achieved with the DesignWare minPower Components will vary, initial customers have reported design power reductions ranging from 2 to 20 percent in tested modes.
The DesignWare minPower Components are scheduled for general availability in Q3 of calendar year 2009. For more information on the DesignWare minPower Components, please visit: http://www.synopsys.com/minpower. For more information on the Eclypse Low Power Solution, visit: http://www.synopsys.com/lowpower.
About DesignWare IP
Synopsys is the leading provider of high-quality, silicon-proven interface and analog IP solutions for system-on-chip designs. Synopsys' broad IP portfolio delivers complete connectivity IP solutions consisting of controllers, PHY and verification IP for widely used protocols such as USB, PCI Express, DDR, SATA, HDMI and Ethernet. The analog IP family includes Analog-to-Digital Converters, Digital-to-Analog Converters, Audio Codecs, Video Analog Front Ends, Touch Screen Controllers and more. In addition, Synopsys offers SystemC transaction-level models to build virtual platforms for rapid, pre-silicon development of software. With a robust IP development methodology, extensive investment in quality and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware
Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
This press release contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934, including Synopsys' expectations of the benefits and availability of the DesignWare minPower Components. These statements are based on current expectations and beliefs. Actual results could differ materially from these statements due to risks and uncertainties including, but not limited to, engineering difficulties, unforeseen difficulties in completing the commercial release of the solution and other risks as identified in the section of Synopsys' quarterly report on Form 10-Q for the fiscal quarter ended June 10, 2009, titled "Risk Factors." Statements included in this release are based upon information known to Synopsys as of the date of this release, and Synopsys assumes no obligation to publicly revise or update any forward-looking statement for any reason.
Synopsys, DC Ultra, DesignWare and Eclypse are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
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