Synopsys Enables System Design Interoperability With System-Level Catalyst Program
Partner Program Extends Standards-Based Interoperability for System-Level Models, Verification and Embedded Software Solutions
MOUNTAIN VIEW, Calif., June 8 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced its System-Level Catalyst Program to accelerate the adoption of system-level design and verification. Open to electronic design automation (EDA) vendors, intellectual property (IP) vendors, embedded software companies and service providers, the program is designed to benefit mutual customers by advancing tool and model interoperability as well as availability of system-level models and services. Members of the System-Level Catalyst Program gain access to Synopsys system-level and rapid prototyping products such as Innovator, DesignWare® System-Level Library, System Studio, Synplify® DSP and the Confirma™ platform. System-Level Catalyst Program members may also use the Synopsys System-Level Catalyst logo with their products or services to indicate system-level interoperability.
"Interoperability and model availability have long been inhibitors for the adoption of system-level design flows," said Gary Smith, chief analyst at Gary Smith EDA, a leading provider of market intelligence and advisory services for the global Electronic Design Automation (EDA), Electronic System Level (ESL) design, and related technology markets. "Making system-level model libraries and tools freely available to members as part of the Synopsys System-Level Catalyst program enables further mainstream adoption of ESL solutions."
The System-Level Catalyst Program provides members tool access to validate and demonstrate interoperability or to support customers:
- IP Providers and EDA vendors get access to and support for Synopsys tool and library offerings to validate and demonstrate interoperability of system-level models of their IP and their tool solutions.
- Embedded software vendors get access to Synopsys' Innovator and DesignWare System-Level Library to validate and demonstrate interoperability of debuggers.
- Qualifying embedded software developers who specialize in the development of drivers and software for Synopsys DesignWare Cores get access to virtual platforms and Confirma rapid prototyping platforms for software development prior to silicon availability.
- Training and services companies can help system-level teams rapidly adopt the best practices for system-level design, virtual platforms, digital signal processing and FPGA based rapid prototyping.
"VDC expects software design and verification to continue to play an increasingly important role in the hardware and system engineering processes. At the same time, software solution providers are looking for improved methods and tools to enable their customers to program to increasingly complex hardware architectures," says Matt Volckmann, Senior Analyst/Program Manager with VDC Research's Embedded Software Practice. "Synopsys' introduction of the System-Level Catalyst program recognizes the necessity for greater collaboration among software and hardware engineering solution companies and the ongoing endeavor of these organizations to provide their customers with the resources required to further advance engineering productivity."
Founding members of the System-Level Catalyst program include: Agilent EEsof, Altera, ARC International, Carbon Design Systems, Cebatech, ChipVision Design Systems, Cofluent Design, CoWare, CriticalBlue, Doulos, Emsys, Enterpoint, Forte Design Systems, GreenSocs, IBM, Imperas, JEDA Technologies, Jungo, Lauterbach, MCCI, NoBug, SDV Ltd., Steepest Ascent, Synfora, Target Compiler, Tensilica, VaST Systems and Xilinx.
"The system-level market's growth and our customers' adoption of system-level methodologies have been limited by severe market fragmentation and lack of model and tools interoperability," said George Zafiropoulos, vice president of Solutions Marketing at Synopsys. "With the System-Level Catalyst Program Synopsys is helping open up the system-level market to mainstream adoption, enabling new levels of interoperability."
To learn more about what Synopsys System-Level Catalyst members are saying about the benefits of the program, please go to https://www.synopsys.com/community/interoperability-programs/system-level-catalyst.html .
About System-Level Catalyst Program
The Synopsys System-Level Catalyst Program provides members access to Synopsys system-level products, enabling the development and support of program members' respective system-level tools, models, training and services. Open to electronic design automation (EDA) vendors, intellectual property (IP) vendors, embedded software companies and service providers, the program is designed to benefit mutual customers by advancing tool and model interoperability as well as availability of system-level models and services.
For more information please go to http://www.synopsys.com/slcatalyst.
Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
Synopsys, Confirma, DesignWare and Synplify are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
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SOURCE: Synopsys, Inc.
Web site: http://www.synopsys.com/