Cloud native EDA tools & pre-optimized hardware platforms
Platform Encompasses New Multicore Simulation Performance, Native Design Checks and Comprehensive Low Power Verification Capabilities
MOUNTAIN VIEW, Calif., April 6 /PRNewswire-FirstCall/ -- Synopsys, Inc. , a world leader in software and IP for semiconductor design and manufacturing, today introduced the latest generation of its Discovery™ Verification Platform, an integrated verification solution for analog/mixed-signal (AMS) and digital designs. Discovery 2009 delivers unprecedented verification productivity with new multicore simulation technologies, native design checks and comprehensive low power verification capabilities throughout the platform. The multicore simulation technologies being introduced today with the VCS® functional verification and CustomSim™ unified circuit simulation solutions - both key components of the Discovery platform - deliver up to four times faster verification than previous solutions. With Discovery 2009, verification engineers are benefiting from significantly higher productivity and faster verification closure for their AMS and digital designs.
In March 2008, Synopsys announced a broad multicore initiative to deploy advanced parallel, threaded and other optimized compute technologies across its verification and implementation and manufacturing platforms to reduce time-to-results. The most recent result of this initiative is the expansion of VCS with multicore technology to deliver 2x faster verification performance. VCS multicore technology removes typical verification bottlenecks associated with interactive simulations and long-running tests by parallelizing tasks such as simulation, coverage, assertions and debug across multiple processor cores. The new CustomSim unified circuit simulation solution integrates best-in-class, high-performance circuit simulation technologies with new multicore capabilities in a single, highly-accurate verification solution that delivers up to 4x performance improvement for large analog and mixed-signal circuits. VCS and CustomSim are tightly integrated via Direct Kernel Integration (DKI) for high-performance mixed-signal simulation.
Discovery 2009 incorporates comprehensive low-power verification capabilities at multiple levels of abstraction, from RTL to transistor level. VCS with MVSIM delivers true voltage-aware RTL and gate-level simulation, automated assertions, and comprehensive verification coverage as defined in the new Verification Methodology Manual for Low Power (VMM-LP) book. CustomSim verifies complex power management designs at the transistor level by identifying IR drop, electromigration and standby leakage issues that can impact the reliability and performance of integrated circuits. This latest generation of the Discovery Platform further strengthens Synopsys' technical leadership in low power design and verification.
As a pioneer of native technologies for functional verification, Synopsys delivered SystemVerilog-based assertion checking in 2003. Today, VCS users have the choice of checking their designs with custom assertions or using VCS Assertion IP for use with standard protocols, including OCP, AXI, USB and PCI. With the introduction of CustomSim, Synopsys is extending native design checking to the AMS verification domain. CustomSim provides a rich set of static and dynamic rule-based circuit checks such as power-down floating gates, missing level shifters, gate-oxide breakdown and forward-biased bulk diodes. Coupled with its high-performance and high-capacity simulation, CustomSim enables engineers to quickly identify design errors before tapeout to avoid costly silicon respins.
"With the increasing complexity and diversity of system-on-chip designs, faster, unified verification solutions are essential," said Bijan Kiani, vice president of Product Marketing at Synopsys. "Discovery 2009 builds on more than a decade of technology innovations, offering unified circuit simulation, multicore performance, native design checks and comprehensive low power verification capabilities to deliver unprecedented performance. As a result, the Discovery Platform delivers higher productivity to enable rapid verification closure for our customers."
Discovery Verification Platform
The Discovery Verification Platform is an integrated AMS and functional verification solution with best-in-class technologies delivering high performance and scalability, including mixed-HDL and AMS simulation, debug, native design checks, assertions, low power verification, verification intellectual property (IP), code and functional coverage, testbench automation and formal analysis. Combined with support for industry-standard hardware design and verification languages, including SystemVerilog, Verilog, Verilog-AMS, VHDL, SystemC™, OpenVera® language, UPF, the VMM methodology and related VMM Applications, the Discovery Platform enables verification engineers to achieve significantly higher productivity and faster verification closure times for their advanced AMS and digital designs. This contributes to first-time silicon success within required project cycles. Discovery is part of the Synopsys Software-to-Silicon Verification Solution, the industry's most comprehensive suite of proven embedded software development, system validation, functional verification and circuit simulation software, hardware, IP, methodologies and services for complex SoC design.
Synopsys, Inc. is the world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
Synopsys, CustomSim, Discovery, Galaxy, OpenVera and VCS are registered trademarks or trademarks of Synopsys, Inc. SystemC is a trademark of the Open SystemC Initiative and is used under license. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
Editorial Contacts: Sheryl Gulizia Synopsys, Inc. 650-584-8635 email@example.com Stephen Brennan MCA, Inc. 650-968-8900 firstname.lastname@example.org
SOURCE: Synopsys, Inc.
Web site: http://www.synopsys.com/