eRide Converts to Synopsys Design Compiler Ultra for Next-Generation GPS Chips
Superior Synthesis Technology and Exceptional Support Cited as Key Decision Factors
PRNewswire-FirstCall
MOUNTAIN VIEW, Calif.
(NASDAQ:SNPS)

MOUNTAIN VIEW, Calif., Sept. 4 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that eRide, a leading provider of location-based technology solutions, has adopted Synopsys' Design Compiler® Ultra synthesis solution to design its next-generation "Opus" global positioning system (GPS) integrated circuits (ICs). Opus ICs are low-power, high-functionality ICs that include ultra-sensitive positioning technology to help wireless carriers reduce the costs. eRide switched to Design Compiler Ultra after an extensive evaluation that demonstrated its ability to deliver superior results over eRide's previous synthesis tool.

"Our previous synthesis solution could not meet the stringent power and area requirements of our next-generation Opus ICs. In evaluating alternate synthesis technologies, we found Design Compiler Ultra with the DesignWare library to be a superior, reliable synthesis solution easily able to address our complex design challenges," said Allen P. Chen, vice president of VLSI Engineering at eRide. "Advanced synthesis technology coupled with excellent support from the Synopsys team drove our decision to adopt Design Compiler Ultra for our next-generation Opus ICs."

The Design Compiler Ultra solution encompasses advanced technologies to concurrently optimize for timing, area and power while delivering the highest test coverage. It also includes innovative topographical technology to accurately predict post-layout timing, area, and power during synthesis. Topographical technology eliminates costly, time-consuming iterations between synthesis and layout to significantly reduce design cycle time. Design Compiler accelerates turnaround time while addressing the complex challenges inherent in complex IC designs.

"Designers rely on Design Compiler's superior technology and quality of results to complete their designs within tight schedules," said Antun Domic, senior vice president and general manager of Synopsys' Implementation Group. "Utilizing Synopsys' unique topographical technology can cut weeks of design cycle time. As the leader in synthesis technology, we continue to bring innovative solutions to market to enable our customers' success."

About Synopsys

Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading system and semiconductor design and verification platforms, IC manufacturing and yield optimization solutions, semiconductor intellectual property and design services to the global electronics market. These solutions enable the development and production of complex integrated circuits and electronic systems. Through its comprehensive solutions, Synopsys addresses the key challenges designers and manufacturers face today, including power management, accelerated time to yield and system-to-silicon verification. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

About eRide

eRide is a private, fabless semiconductor company that develops and markets high sensitivity Assisted GPS (A-GPS) solutions for location based services and mobile phones. eRide combines its GPS system expertise with RF and digital semiconductor technology to offer GPS chipsets, navigation software plug-ins, aiding servers and a GPS global reference network. eRide's technology has been adopted by a number of world-class semiconductor companies, navigation companies, and cellular network operators. Founded in 1999, eRide is headquartered in San Francisco, California, and has offices in North America, Asia and Europe. Visit eRide online at http://www.eride.com/.

Synopsys, Design Compiler and DesignWare are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks mentioned in this release are the intellectual property of their respective owners.

  Editorial Contacts:
  Sheryl Gulizia
  Synopsys, Inc.
  650-584-8635
  sgulizia@synopsys.com

  Lisa Gillette-Martin
  MCA, Inc.
  650-968-8900 ext. 115
  lgmartin@mcapr.com

  Stan Woo
  eRide, Inc.
  415-848-7815
  Stan@eRide.com

SOURCE: Synopsys, Inc.

CONTACT: Sheryl Gulizia of Synopsys, Inc., +1-650-584-8635,
sgulizia@synopsys.com, or Lisa Gillette-Martin of MCA, Inc., +1-650-968-8900
ext. 115, lgmartin@mcapr.com, or Stan Woo of eRide, Inc., +1-415-848-7815,
Stan@eRide.com

Web site: http://www.synopsys.com/