Synopsys Enhances Library Compiler to Put Current-Source Models Within Reach of Every Designer
MOUNTAIN VIEW, Calif., April 4 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced significant new technology updates to its widely-used Library Compiler solution designed to assure high-quality current-source libraries while reducing characterization cost. A new set of features in Library Compiler will enable current-source library validation, correlation, compaction and model translation all with near-HSPICE® simulation accuracy.
"The long-standing collaboration between ARM and Synopsys has enabled continuous availability of high-quality IP models for our mutual customers," said Herb Gebhart, director of product marketing, Physical IP, ARM. "To expand availability of CCS views, ARM works with Synopsys on validation and correlation automation using Library Compiler technology. An automated flow enables a consistent and streamlined delivery of high-quality views."
"In order to get the best accuracy from PrimeTime®, the industry's golden sign-off tool, designers need high-quality library models," said Jim McCanny, chief executive officer at Altos Design Automation. "Using the new Library Compiler technology, we've worked with Synopsys to do closed-loop validation and correlation of CCS timing and noise libraries generated with Altos Liberate. We are seeing excellent accuracy correlation between PrimeTime and HSPICE simulation to within 2 percent."
"Current-source models address key nanometer modeling needs and are becoming crucial at 65 nanometers and below," said Ken Liou, director of the IP and Design Support Division at UMC. "These new models require efficient quality assurance to ensure that they deliver the best results when used in EDA applications. We have worked closely with Synopsys to automate the validation and correlation of our CCS libraries using the new Library Compiler features and have experienced highly-accurate results."
"As a semiconductor industry trusted IP partner, Virage Logic is committed to delivering the highest quality semiconductor IP to our customers which includes validated EDA tool views," said Mary Ann White, director of business development at Virage Logic Corporation. "Through adoption of the core checking capabilities that will be available in Library Compiler, we will be able to broaden our support to include quality CCS timing and noise views in our advanced process technology IP products."
Current-source modeling is a key technology that significantly increases library accuracy by modeling new effects that have emerged at the 65- nanometer-and-below process technologies. Widespread adoption of this modeling technology has been hindered by the lack of library quality-assurance tools, a multifold increase in data size, and multiple standards. To address these challenges, Synopsys enhanced Library Compiler to include a suite of library quality assurance, compaction, merging, scaling and model translation functions.
Using the open-source Liberty™ Composite Current Source (CCS) models, these new Library Compiler capabilities give library developers unsurpassed flexibility in delivering verified libraries at scaled voltage or temperature corners for tool flows from multiple vendors. Library Compiler helps assure high-quality CCS models for end users by performing automated validation and closed-loop correlation checking between the two industry "gold standards" for accuracy, the Synopsys PrimeTime sign-off solution and the HSPICE simulator. Library Compiler can also create legacy non-linear delay models (NLDM) or other third-party current-source models from CCS models, since they are a universal superset.
"At 65 nanometers and below, customers have tried to address new nanometer effects by characterizing more library corners and increasing guard- band margins," said Ahsan Bootehsaz, vice president of Research and Development, Synopsys Implementation Group. "Synopsys introduced CCS modeling technology to help customers address these modeling challenges without increasing cost. The new Library Compiler capabilities allow customers to take full advantage of current-source modeling technology without worrying about format standards, library quality assurance or data size."
Library Compiler is available today, with the newest functionality enhancements in limited customer availability in the 2007.03 release. General availability will commence with the 2007.06 release.
Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.
Synopsys, HSPICE and PrimeTime are registered trademarks of Synopsys, Inc. Liberty is a trademark of Synopsys, Inc. ARM is a registered trademark of ARM Limited. All other brands or product names are the property of their respective holders. "ARM" is used to represent ARM Holdings plc; its operating company ARM Limited; and the regional subsidiaries ARM INC.; ARM KK; ARM Korea Ltd.; ARM Taiwan; ARM France SAS; ARM Consulting (Shanghai) Co. Ltd.; ARM Belgium N.V.; AXYS Design Automation Inc.; AXYS GmbH; ARM Embedded Solutions Pvt. Ltd.; ARM Physical IP, Inc.; and ARM Norway, AS. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
Rachel Modena Barasch
SOURCE: Synopsys, Inc.
CONTACT: Sheryl Gulizia of Synopsys, Inc., +1-650-584-8635,
firstname.lastname@example.org; or Rachel Modena Barasch of MCA, Inc., +1-650-325-7547,
Web site: http://www.synopsys.com/