TSMC, NVIDIA and VLSI Research to Keynote at 11th Annual Advanced Reticle Symposium
Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced the program for the eleventh annual Advanced Reticle Symposium (ARS). As the electronic design automation (EDA) and semiconductor industries reflect on the 40th anniversary of Moore's law, this year's ARS will address the state of semiconductor technology advancement and its impact not only on economic growth but also on society worldwide.
Unique this year is an opening plenary session which will feature presentations by Dan Hutcheson, CEO of VLSI Research, Rick Cassidy, president of TSMC North America and Chris Malachowsky, co-founder and senior vice president of Engineering and Operations at NVIDIA. These semiconductor supply chain experts will offer their unique perspectives on photomask issues and the impact of Moore's Law.
Attendees will examine and discuss a broad range of topics on the challenges of designing at process nodes of 90 nanometers and below, and how these challenges impact time-to-yield, value chain optimization, technology and business trends, the exponential growth in data volumes, and verification strategies.
The program will also feature presentations from analysts and experts at Gartner/Dataquest, DNP, Micronic Laser Systems, Photronics, Synopsys and Toppan Photomasks. In addition, attendee participation is encouraged during the afternoon panel discussion, "Is Moore's Law Valid in Today's Environment?" The event will conclude with exhibits and an evening reception where attendees can relax and mingle with colleagues. Supporting sponsors for this year's symposium include DNP, Microlithography World Magazine, Micronic, Pennwell, Photronics, Solid State Technology Magazine, SPIE, Synopsys, Toppan Photomasks, Inc. and Ultratech.
The Advanced Reticle Symposium has become the world's leading forum dedicated to the discussion of the "tech-onomics" of advanced photomasks. This one day forum draws together a unique combination of executives, engineering managers, technologists and key decision makers from leading design, equipment, software, photomask and fab and fabless semiconductor companies. Last year more than 300 people attended ARS.
"Forty years ago, Gordon Moore predicted the world of soaring gate counts that we are dealing with today," said Raul Camposano, senior vice president and general manager, Silicon Engineering Group at Synopsys. "Deep submicron process nodes and physical limitations are impacting the way we design silicon devices and challenging existing business models. The overarching need for design for manufacturing (DFM) techniques throughout the design cycle is unmistakable. Only through collaboration among design and manufacturing companies, and a holistic approach to DFM throughout the design cycle, will we be able to meet the challenges that have arisen as a result of the complexity Moore predicted."
ARS will take place on June 28 at the San Jose McEnery Convention Center. This is the second year Synopsys is serving as managing sponsor for the symposium. Additional information and online registration is available at https://www.synopsys.com .
Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/ .
NOTE: Synopsys is a registered trademark of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
SOURCE: Synopsys, Inc.
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