Synopsys Reduces Area and Power With Lowest Gate Count, Modular Hi-Speed USB On-The-Go Core
Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced the release of its DesignWare® Hi-Speed Universal Serial Bus (USB) On-The-Go (OTG) controller core, the lowest gate count IP available on the market. The core lowers per-chip cost with reduced area and power requirements. As part of the only complete IP solution for USB, which includes Synopsys' digital cores, mixed-signal physical interface (PHY) cores and verification intellectual property (VIP), the DesignWare IP solution reduces designer risk.
The core is a modular version of earlier silicon-proven DesignWare Hi-Speed USB and OTG cores. The modular core allows designers to select the specific features to match their applications and then use the included Synopsys coreConsultant tool to automatically optimize the core. USB OTG enables "outside-the-box" connectivity with hot-swap capability for industrial, consumer, embedded, PC and PC peripheral products.
"This configurable, optimized version of our silicon-proven DesignWare Hi-Speed USB OTG IP allows designers to add OTG functionality while minimizing silicon area," said Eric Huang, product marketing manager, Synopsys DesignWare USB IP. "This saves both chip cost and power, making the Synopsys' USB OTG core a cost-effective solution for designers wanting to add USB functionality to their designs." Synopsys continues to lead the way in risk reduction by participating in the first Hi-Speed USB OTG testing, which will be held by the USB Implementers Forum in February 7-11, 2005 in Milpitas, California. Huang also serves as chair of the On-The-Go Working Group, the USB-IF committee that develops the OTG specifications.
The DesignWare digital and PHY cores for Hi-Speed USB OTG, Hi-Speed USB Host and Hi-Speed USB Devices are currently available. DesignWare USB verification IP is also currently available to DesignWare Library and DesignWare Verification Library customer for no additional charge.
About DesignWare Cores
The DesignWare Cores provide system designers with silicon-proven, digital and analog connectivity IP for some of the world's most recognized products including communications processors, routers, switches, game consoles, digital cameras, computers and computer peripherals. The DesignWare Cores family includes industry-leading connectivity IP such as USB 1.1, 2.0, OTG and PHYs, PCI, PCI-X®, PCI Express™, PCI Express PHY, SATA and Ethernet. Provided as synthesizable RTL source code or in GDS format, these cores enable designers to create innovative, cost-effective systems-on-chip and embedded systems. Synopsys provides flexible licensing options for the DesignWare Cores. Each core can be licensed individually, on a fee-per-project basis, or users can choose to license all of its cores under one simple agreement.
Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.
NOTE: Synopsys and DesignWare are registered trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
SOURCE: Synopsys, Inc.
CONTACT: Troy Wood of Synopsys, Inc., +1-650-584-5717, or
email@example.com; or Julie Crabill of Edelman, +1-650-429-2732, or
Julie.firstname.lastname@example.org, for Synopsys
Web site: http://www.synopsys.com/