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Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that NEC Electronics has adopted Synopsys' phase-shift mask (PSM) technology for production of its high-performance 65-nanometer (nm) processor and logic chips. By implementing this key technology, which is part of Synopsys' comprehensive design for manufacturing (DFM) solution, NEC Electronics can enhance yields, decrease leakage current, and maximize chip performance through tight critical dimension control over the lithography process.
Synopsys PSM technology is being increasingly deployed by high-performance system-on-chip (SoC) manufacturers worldwide. It gives designers the benefit of tighter control of critical dimension (CD), the width of feature sizes on the silicon, and enhanced lithography resolution which is critical at the 65-nm node and beyond. The benefit of this tighter CD is increased chip performance and higher yield, which means more dies on the wafer meet design specifications. Synopsys' PSM technology will be used to support the ramp of NEC Electronics' 65-nm CMOS process.
"To increase the performance of our products, we must move to deeper submicron processes and adopt technology that addresses unique manufacturing requirements," said Shuichi Inoue, general manager of the Manufacturing Operations Unit at NEC Electronics. "Synopsys' PSM technology substantially enhances the resolution of our existing lithography equipment enabling us to increase our yields, decrease leakage current, and improve our chip performance at the 65-nanometer node.
"We work closely with our customers to develop processes which accelerate high-yield chip production on advanced process nodes," said Anantha Sethuraman, vice president of marketing for DFM, Synopsys. "Synopsys' PSM technology is a proven solution for delivering the lithography resolution required for the 65-nanometer process node. This success further validates Synopsys' leadership position in providing a comprehensive DFM solution for high-yield designs at 65 nanometers and beyond."
About Synopsys DFM
Synopsys offers the industry's most comprehensive design for manufacturing (DFM) solution that spans from RTL to silicon. Its DFM product family addresses critical manufacturability and yield issues with the following DFM products: Hercules™ physical verification, Proteus mask synthesis, CATS® mask data preparation, SiVL® lithography verification, i-Virtual Stepper™ mask defect dispositioning, patented PSM technology, and physics-based TCAD suite of simulation products. Its production-proven phase-shifting technology and software enables semiconductor manufacturers to more reliably and cost-effectively fabricate subwavelength integrated circuits (ICs) using available optical lithography equipment. The company's phase-shifting technology is the only commercially available strong phase-shifting technology currently used in IC production. This technology has been used to fabricate transistors as small as 9 nanometers using 248-nm lithography equipment -- dramatically smaller than the 30-nm transistors used at the 65-nm process node. Synopsys' Manufacturing Yield Management (MYM) solutions extend directly into the fab, providing customers real time access to the yield data and the analysis capability needed to reduce random, systematic and parametric defects. This accelerates the introduction of new designs by significantly reducing the time it takes to get from concept to manufacturing. Synopsys takes a systematic approach to design for manufacturing that makes intelligent use of design and manufacturing data throughout its entire flow to help ensure that designs at 65 nanometers (nm) and smaller geometries will achieve desired yield goals.
Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http:/www.synopsys.com.
Synopsys, CATS, and SiVL are registered trademarks of Synopsys, Inc. Hercules and i-Virtual Stepper are trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
Editorial Contacts: Heather Kettmann Synopsys, Inc. 650-584-4723 firstname.lastname@example.org Angela Costa Edelman PR 650-429-2769 Angela.email@example.com
SOURCE: Synopsys, Inc.
CONTACT: Heather Kettmann of Synopsys, Inc., +1-650-584-4723,
firstname.lastname@example.org; Angela Costa of Edelman PR for Synopsys, Inc.,
Web site: http://www.synopsys.com/