Synopsys Announces Production Support for New Oasis File Transfer Format
New Specification Targets Increasing File Size, Need for Common Data Format
PRNewswire-FirstCall
MOUNTAIN VIEW, Calif.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that its Galaxy™ Design Platform and Design For Manufacturing (DFM) tool suite support the entire Open Artwork System Interchange Standard (OASIS) file transfer format with all current production releases. All relevant Synopsys software now support the OASIS format for design and production, including; Astro™, IC Compiler, CATS®, Hercules™, Proteus, SiVL® and Star-RCXT™ software products. These products provide the full benefit of OASIS' file compression capability and support the entire specification including the ability to process CBLOCK records which embed compressed data for additional compactness.

Synopsys was an early participant in the Semiconductor Equipment and Materials International Data Path Task Force Working Group (SEMI DPTF-WG) that defined the new format.

The OASIS specification handles the ever increasing GDSII file sizes of complex deep submicron designs. The specification's compact representation of geometric shapes can reduce file size enabling better tool performance. It also reduces storage requirements and speeds data file transmission. Adoption of OASIS will answer the need for common, open data formats for transferability between mask data prep (MDP) tools.

Mask data file sizes have become so large at the 65-nm node that they are unmanageable in a cost-sensitive mask manufacturing environment, captive or merchant. When fully implemented, OASIS data file sizes decrease by 10-50X and the expression of those files can improve the performance of many of the tools and databases.

Effective management of mask data at 65-nm and beyond is not only about file size reduction. Tool-to-tool data file interoperability and portability are relevant contributing factors affecting the rising costs of design and mask manufacturing.

"The industry is at a key transition point where geometric design and mask layout data can no longer be represented and expressed efficiently enough by GDSII," said Tom Grebinski, president and CEO of OASIS Tooling. "Synopsys invested significantly in the development of newer features and infrastructure supporting optimal interoperability that scale with the business and technological needs of its customers. High performance, OASIS compliant and interoperable MDP tools, such as those introduced here by Synopsys, become critical and timely for the replacement of GDSII tools."

"Synopsys always strives to embrace standards that improve our customers' design quality and speed their time to results," said Raul Camposano, Synopsys' senior vice president, chief technical officer and general manager, Silicon Engineering Group. "With our Galaxy Design Platform and DFM product family support of the entire OASIS specification, we will help designers handle the burgeoning size and complexity of today's advanced designs and ease the transition to a new standard file transfer format."

About Synopsys DFM

Synopsys offers the industry's most comprehensive design for manufacturing (DFM) solution that spans from RTL to mask. Its DFM product family addresses critical manufacturability and yield issues with its Hercules physical verification, Proteus mask synthesis, CATS mask data preparation, SiVL lithography verification, i-Virtual Stepper™ mask defect dispositioning, patented PSM technology, and physics-based TCAD suite of simulation products. Synopsys takes a systematic approach to design for manufacturing that makes intelligent use of design and manufacturing data throughout its entire flow to help ensure that designs at 90 nanometers (nm) and smaller geometries will achieve desired yield goals. Synopsys' DFM product family is the solution of choice for yield-sensitive, high-complexity chips, worldwide.

About Synopsys

Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/ .

NOTE: Synopsys, CATS, i-Virtual Stepper and SiVL are registered trademarks of Synopsys, Inc. Astro, Hercules, and Star-RCXT are trademarks of Synopsys. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

CONTACT: Jennifer Scher of Synopsys, Inc., +1-650-584-5594, or scher@synopsys.com; or Julie Crabill of Edelman, +1-650-429-2732, or julie.crabill@edelman.com, for Synopsys, Inc.

SOURCE: Synopsys, Inc.

CONTACT: Jennifer Scher of Synopsys, Inc., +1-650-584-5594, or
scher@synopsys.com; or Julie Crabill of Edelman, +1-650-429-2732, or
julie.crabill@edelman.com, for Synopsys, Inc.

Web site: http://www.synopsys.com/