Microchip Technology Saves Weeks in Analog Design Time With Synopsys' Circuit Explorer
Optimization and Analysis Solution Results in Improved Productivity, Fewer Re-Spins and Reduced Time to Market
Synopsys, Inc. (NASDAQ: SNPS), the world leader in semiconductor design software, today announced that Microchip Technology Inc., a leading provider of microcontroller and analog semiconductors, has standardized on Synopsys' Circuit Explorer optimization and analysis solution for its complex analog designs. The Microchip team selected Circuit Explorer because it enabled them to take weeks off of their design cycle and eliminate the tedious manual tasks usually associated with complex analog designs.
"With Circuit Explorer's optimization and analysis capabilities, we were able to accomplish in days what would have taken weeks with other tool flows," said Craig Filicetti, simulation manager at Microchip Technology Inc. "Circuit Explorer's optimizer doubled the speed of one of our designs while shrinking the circuit's area 20 percent. We completed this design in two weeks using Circuit Explorer, which would have taken 10 weeks to do by hand. Circuit Explorer's analysis capabilities, alone, were an improvement over the manual design flow. With the click of a button, we were quickly able to understand our circuit performance over all of the PVT (process, voltage and temperature) corners. We evaluated several tools for optimization and analysis, and determined that Circuit Explorer was clearly the best tool for our needs."
Circuit Explorer's optimization capabilities enable designers to have greater control of their designs. Circuit Explorer assists designers by automating the iterative task of sizing each device in their circuit and running numerous simulations to meet performance specifications. This not only saved time for Microchip engineers, by freeing them up for other tasks, but also automatically validated their overall design measurements and PVT corner conditions.
Microchip engineers are using Circuit Explorer's unique graphical data display to explore the design space and quickly comprehend the performance tradeoffs within their circuit architectures. When designers used a manual design flow, they were never exposed to the circuit's trade-off options. Taken together, Circuit Explorer's optimization, analysis and trade-off capabilities can increase circuit performance, reduce costly re-spins and shorten time to market.
"Since incorporating Circuit Explorer's complementary optimization and analysis technology with our industry leading circuit simulation solution, we have seen it steadily gaining traction in our customer base," said Dr. Edmund Cheng, vice president of marketing for analog and mixed-signal products at Synopsys. "Our customers are obtaining increased designer productivity and improved design quality since incorporating Circuit Explorer into their flows. Circuit Explorer is proving to be an instrumental part of our analog and mixed-signal design and verification solutions."
Synopsys, Inc. is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/ .
NOTE: Synopsys is a registered trademark of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
SOURCE: Synopsys, Inc.
CONTACT: Lynda De Vol of Synopsys, Inc., +1-650-584-1190, or
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Web site: http://www.synopsys.com/