Press Releases

Aarohi Deploys Synopsys' VCS Native Testbench to Verify Next-Generation Storage Chip
Latest Release of VCS® Solution Extends Verification Performance and Effectiveness With New, Powerful Native Testbench Capabilities
PRNewswire-FirstCall
MOUNTAIN VIEW, Calif.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that Aarohi Communications, Inc., a provider of intelligent storage area network components, has adopted Synopsys' VCS comprehensive RTL verification solution, a key component of the Discovery™ Verification Platform, for the functional verification of Aarohi's next-generation FabricStream™ intelligent storage product. The unique, single-compiler Native Testbench (NTB) technology in the VCS solution will enable Aarohi to increase the performance and effectiveness of their verification environment as compared to using separate testbench and simulation tools. Aarohi selected the latest release of the VCS solution, version 7.2, which extends its NTB capabilities to include functional coverage, Synopsys Reference Verification Methodology (RVM) support and assertion reactivity.

"VCS -- our longstanding choice for simulation -- now gives us a fully integrated RTL verification solution in a single tool," said Kaushik Patel, vice president of Hardware Engineering at Aarohi. "We have successfully migrated our existing verification environment to the VCS solution with NTB and are using it on our next-generation chip project. Synopsys' VCS NTB capability increases our engineering productivity by providing one integrated solution to power our verification environment, as compared to using multiple tools with our earlier projects."

Latest Version of the VCS Solution Adds New Capabilities

New capabilities in the VCS 7.2 version expand its NTB capabilities and include functional coverage, support for the RVM and assertion reactivity. The functional coverage engine provides a measurement of verification completeness by allowing engineers to specify design functions that should be measured during verification, collect data on exercised functions, and analyze the resulting coverage data. The VCS solution now includes support for the RVM, which embodies years of industry know-how from leading experts on building advanced, reusable verification environments. The RVM includes extensive documentation on testbench architecture and best practices, as well as a library of reusable and extensible testbench and assertion building blocks to reduce verification environment development time and increase bug-finding effectiveness. The VCS solution also provides a comprehensive assertion-checker library and now enables assertion-testbench reactivity for both SystemVerilog and OpenVera® assertions. It supports industry-standard hardware design and verification languages, including Verilog, VHDL, SystemVerilog, SystemC™ and OpenVera. The VCS 7.2 version is available immediately.

"The VCS single-compiler technology with NTB, assertions, coverage and support for multi-language verification provides the industry's most comprehensive RTL verification solution," said Farhad Hayat, vice president of Marketing, Verification Group, Synopsys, Inc. "Aarohi is among many leading-edge customers that are moving from fragmented point-tools to the VCS solution to take advantage of advanced, built-in, bug-finding technologies for the best performance, productivity and return-on-investment."

Synopsys Discovery Verification Platform

The Discovery Verification Platform is a unified environment that provides high performance and efficiency of interaction among all platform components, including mixed-HDL simulation, mixed-signal, system-level verification, assertions, verification intellectual property, code coverage, functional coverage, testbenches and formal analysis. Combined with support for industry-standard hardware design and verification languages, including Verilog, VHDL, SystemVerilog, SystemC and OpenVera and Synopsys' proven RVM, the Discovery Verification Platform helps designers achieve higher levels of verification productivity by contributing to first-time silicon success within required project cycles.

About Synopsys

Synopsys, Inc. is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

NOTE: Synopsys, OpenVera and VCS are registered trademarks of Synopsys, Inc. Discovery is a trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

SOURCE: Synopsys, Inc.

CONTACT: Isela Warner of Synopsys, Inc., +1-650-584-1644, or
igamboa@synopsys.com; or Sarah Seifert of Edelman, +1-650-968-4033, or
sarah.seifert@edelman.com, for Synopsys, Inc.

Web site: http://www.synopsys.com/