Renesas Technology Adopts Synopsys' Jupiter XT Design Planning Flow for 90 Nanometer Designs
Renesas Technology Expands Its Commitment to Galaxy Design Platform to Improve Turnaround Time
Synopsys, Inc. (NASDAQ: SNPS), the world leader in semiconductor design software, today announced that Renesas Technology Corp., a joint venture between Hitachi, Ltd. (NYSE: HIT)(TSE: 6501) and Mitsubishi Electric Corporation (TSE: 6503), has adopted Synopsys' JupiterXT™ design planning flow to improve turnaround time on chips for leading consumer electronics devices. Renesas Technology is expanding its commitment to Synopsys' Galaxy™ Design Platform through this adoption as it already uses Synopsys' Design Compiler®, PrimeTime®, Star-RCXT™ and Astro™ products.
Renesas Technology adopted Synopsys' JupiterXT design planner because it enables Renesas Technology designers to save valuable time by creating high quality floorplans in significantly fewer iterations. JupiterXT provides Renesas Technology with a convergent design flow due to high correlation of placement, timing, extraction and power network analysis engines between JupiterXT and the rest of Galaxy's implementation and sign-off tools. JupiterXT's automatic embedded macro placement, power network analysis and power network synthesis will also help Renesas Technology eliminate the "ping-pong" effect that normally occurs between chip-level and block-level floorplanning.
"We needed a 90 nanometer solution for design planning and, after evaluating Synopsys' JupiterXT, found that it produced results comparable to those created by tedious manual design iterations, performance necessary for our designs, which feature very high gate counts and multiple embedded macros," said Hisaharu Miwa, Department Manager of EDA Technology Development Department at Renesas Technology. "The decision to use JupiterXT solidifies a long-term commitment to Synopsys technology and recognizes JupiterXT's ability to produce the fastest path to high-quality results."
"Synopsys is focused on delivering a highly correlated, convergent design flow to customers such as Renesas Technology, for their most challenging chip designs," said Antun Domic, senior vice president and general manager of Synopsys' Implementation Group. "JupiterXT is a key component in this flow, helping customers to reduce iterations of their designs and to achieve the fastest time to results."
Synopsys, Inc. is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/ .
NOTE: Synopsys, the Synopsys logo, Design Compiler and PrimeTime are registered trademarks of Synopsys, Inc., and Astro, Galaxy, JupiterXT and Star-RCXT are trademarks of Synopsys, Inc. All other products mentioned in this release are the intellectual property of their respective owners.
SOURCE: Synopsys, Inc.
CONTACT: Robert Smith of Synopsys, Inc., +1-650-584-1261, or
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Web site: http://www.synopsys.com/