Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Dec 3, 2014
Q4 2014 Financial Highlights
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Nov 19, 2014
IP Prototyping Kits Enable Designers to Accelerate Prototyping, Software Development and Integration of IP into SoCs
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Nov 18, 2014
Reduced Congestion and MCMM Synthesis Cut Weeks from Schedule
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Nov 17, 2014
Synopsys DRC and LVS Signoff Has Speed and Capacity to Handle Huge Flexible Screen Devices
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Nov 11, 2014
High-Quality DesignWare IP, Verification IP and Galaxy Design Platform Tools Deliver Lower Power, Smaller Area and Faster Time-to-Market for Wi-Fi Networking SoC
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Nov 10, 2014
CODE V 10.7 Now Generally Available
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Nov 6, 2014
Processor Designer Tool Enables KYOCERA Design Team to Reduce Overall Project Schedule by Nine Months
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Nov 5, 2014
Better Software. Faster! Book Details Methodology Enabling Developers to Achieve Early Software Development before Hardware Availability
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Oct 30, 2014
Silicon-Proven, Reprogrammable NVM IP Delivers Smallest Area for Calibration and Trimming Applications
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Oct 29, 2014
Integrated IP Subsystem, Including ARC EM DSP Processors, Floating Point Unit and Control Peripherals, Improves Performance, Energy Consumption and Design Flexibility
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Oct 28, 2014
Industry-First Solution Includes DesignWare USB 3.1 Controller, IP Virtual Development Kit and Verification IP
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Oct 28, 2014
Success Drives Panasonic SoC Adoption of IC Compiler II
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Oct 27, 2014
VC Apps Open APIs Automate Memory Testbench Generation and Debug
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Oct 27, 2014
Synopsys Synplify Pro Synthesis Tool Delivers Superior Quality of Results for Users of Gowin Semiconductor FPGAs
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Oct 21, 2014
28-nm Runset Availability Enables Signoff Physical Verification for Mutual Customers
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Oct 21, 2014
New Multi-Memory Bus Processor Cuts Test Logic in Half While Maintaining High Performance for Networking SoC
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Oct 20, 2014
DesignWare STAR Memory System for Embedded Flash Reduces Test Cost by 20 Percent and Enables In-Field Diagnostics for IoT and Automotive SoCs
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Oct 20, 2014
Standardizes on DFTMAX Ultra for Designs with Few Test Pins
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Oct 15, 2014
OWASP and C# Capabilities in Coverity Scan Expanded to Support Open Source Community
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Oct 14, 2014
Successor to Popular ARC 770D Core Delivers Significant Performance Increase, Support for 40-bit Physical Addresses and L2 Cache
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Oct 8, 2014
Achieves Single-pass Timing and Power ECO Closure on Multiple Tapeouts Including FinFET
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Oct 7, 2014
Native SystemVerilog-based VIP for PCI Express architecture now supports M-PCIe technology, with built-in coverage, verification plan and protocol-aware debug
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Oct 1, 2014
Power Savings Enabled by Unique Techniques and Design Flow Supported by Design Compiler Graphical, IC Compiler and PrimeTime Tools
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Sep 30, 2014
Single, unified Liberty variation format standardized by the IEEE Industry Standards Board
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Sep 30, 2014
Collaboration Enables Best Practices for Custom Implementation Productivity with FinFET Devices
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Sep 29, 2014
Industry Leaders Sign Multi-year Subscription Agreement to Accelerate Design and Verification of ARM-based SoCs using Synopsys Tools
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Sep 25, 2014
Certification of Digital and Custom Tools Enables Early Adopters to Realize QoR Benefits of the New Processes
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Sep 23, 2014
Next-Generation Verification Platform to Accelerate Time-to-Market by Months
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Sep 22, 2014
New Innovations Also Reduce Leakage Power and Accelerate Design Schedules
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Sep 18, 2014
High-Quality, Silicon-Proven IP Accelerates Project Schedule by Four Months in Highly Competitive Mobile Market
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Sep 17, 2014
Native SystemVerilog-based MIPI C-PHY Verification IP Broadens Synopsys' VIP Portfolio Enabling Verification of Full Family of MIPI Alliance PHY Options
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Sep 17, 2014
Latest Release Delivers Higher Performance and Lower Power for Advanced Design
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Sep 17, 2014
Industry-First Support for MIPI D-PHY v1.2 Specification Increases Performance to 2.5 Gbps While Lowering Cost for Image Sensor and Display Applications
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Sep 15, 2014
Selection of Synopsys' Solutions Based on Superior Results for Analog Mixed-signal Designs
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Sep 10, 2014
Native SystemVerilog-based VIP Used in Advanced Testbench Methodology Environment to Address SoC Verification Challenges
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Sep 10, 2014
Expands Capabilities of RSoft OptSim to Accelerate Design of PIC-enabled, High-performance Optical Telecommunications Systems
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Aug 25, 2014
Annual Competition Recognizes Student Achievements in Optical Design
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Aug 21, 2014
Use of Silicon-Proven DesignWare USB IP by More than 60 Companies Demonstrates High Quality and Low Integration Risk
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Aug 20, 2014
Q3 2014 Financial Highlights
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Jul 15, 2014
Native SystemVerilog Ethernet 1G/10G/40G/100G VIP now includes UNH compliance source-code test suite
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Jul 8, 2014
New Trim NVM IP Leverages Faster Programming Times to Reduce NVM Test Time by 3X Without Compromising AEC-Q100 Quality
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Jul 8, 2014
Protocol test suites in SystemVerilog source code accelerate compliance testing of Ethernet, USB, PCI Express, ARM AMBA AXI and MIPI CSI-2 protocols
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Jun 30, 2014
Collaboration enables stochastic modeling of device degradation and reliability through industry leading Sentaurus Device TCAD simulator
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Jun 24, 2014
Production-Ready DesignWare IP for TSMC 28HPC Process Enables Designers to Reduce Power Consumption and Area for Mobile and Ultra Low-Power IoT Designs
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Jun 23, 2014
New Program Provides Prototypers with Daughter Boards and Services from Synopsys-Approved Third Party Providers
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Jun 17, 2014
Latest innovations drive tighter collaboration between Development and QA, enabling organizations to develop and deliver better software, faster.
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Jun 4, 2014
Synopsys Galaxy Design Platform Enables Designers to Take Full Advantage of High-Performance and Low Power of 28-nm FD-SOI
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Jun 4, 2014
Leading technology provider for the oil and gas industry to share software testing best practices on webcast
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Jun 3, 2014
Extends Production-Proven 22-nm Design Enablement to 14-nm for Cloud Infrastructure and Mobile Market Segments
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Jun 3, 2014
DDR and LPDDR Verification IP Now Broadly Available
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Jun 3, 2014
New Formal Verification, Clock Domain Crossing and Low Power Static Checking Products Offer 3X to 5X Performance and Capacity, Ease-of-use and Advanced Debug Needed for Complex SoC Verification
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Jun 2, 2014
New DesignWare IP Development Kits and Customized Subsystems Accelerate Prototyping, Software Development and Integration of IP into SoCs
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Jun 2, 2014
FinFET-ready Silicon-proven Tools and IP Available for Immediate Design of SoCs
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May 29, 2014
New ARC EM5D and EM7D Cores Combine High-Efficiency Control and Signal Processing to Minimize Energy Use in Sensor, Voice and Audio Processing Applications
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May 27, 2014
Silicon Success of DesignWare USB 3.0 femtoPHY, Logic Libraries and Embedded Memories in TSMC 16-nm FinFET Process Verifies Robustness of Both IP and Process
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May 22, 2014
High-Quality DesignWare PHY, Controller and Verification IP for PCI Express Architecture Doubles Performance to 16 GT/s for Enterprise SoC Designs
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May 21, 2014
Q2 2014 Financial Highlights
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May 15, 2014
Combined Software Testing Solution is Expected to Improve Software Quality by Breaking Down Barriers between Development and Quality Assurance
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May 8, 2014
Certified Decoder Supports Multiple DTS Audio Formats with High-Quality Audio Streaming for Internet-Connected Products
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May 7, 2014
Synopsys Virtualizer Development Kits Accelerate Software Development, Integration and Test for Freescale Automotive Microcontrollers and Processor-based Designs
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May 1, 2014
Achieves Higher Operating Frequencies and Smaller Area
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Apr 30, 2014
Delivers 3X Higher Test Compression and Ease-of-Deployment
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Apr 29, 2014
Small Footprint PHYs on 14/16-nm FinFET and 28-nm Processes Reduce Silicon Cost for Consumer, Mobile, Storage and Networking Applications
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Apr 28, 2014
Enables 2X Faster Implementation and Verification of Functional ECOs
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Apr 25, 2014
Coverity to host webcast to help developers find and fix 'Heartbleed'
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Apr 23, 2014
PHY, Controller and Verification IP Deliver up to 3200 Mbps Speeds for High-End Smartphones and Tablets
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Apr 23, 2014
Prototyping Automation and Debug Software for HAPS FPGA-based Prototyping Systems Improves Prototyping Performance
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Apr 23, 2014
Collaboration Also Enables In-Design Physical Verification with IC Compiler
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Apr 15, 2014
Coverity Opens Up Access to Free Development Testing Service, Allows Anyone Interested in Open Source Software Quality to View Projects
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Apr 14, 2014
Certification Enables Designers to Realize the Power, Performance and Area Benefits of FinFET Technology
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Apr 9, 2014
Coverity Scan Earns Prestigious Software Industry Recognition
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Mar 27, 2014
Virtualizer Development Kit Speeds Software Development, Integration and Test of Powertrain Electronic Control Units Using RH850/E1x Series of MCUs
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Mar 26, 2014
Better Software. Faster! Book Shares Best Practices from More Than 10 Contributing Companies across Key Market Segments
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Mar 25, 2014
Synopsys Enters Software Quality and Security Market as Market Leader
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Mar 25, 2014
Initial Components of Initiative Extend Proven Verification Methodology and Technologies for Mixed-Signal Applications
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Mar 24, 2014
Industry Leaders Collaborate with Synopsys to Bring New Technology into Production Use
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Mar 18, 2014
Successful Collaboration on Design Planning Automation is a Pivotal Contributor
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Mar 11, 2014
Gigahertz Performance, Coupled With Energy-Efficiency Requirements, Drive the Switch to IC Compiler
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Mar 4, 2014
Delivers next-generation software technologies for complete verification flow
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Feb 25, 2014
ZeBu Server-3 emulator achieves 3.5 MHz performance on PowerVR Series 6 GPU to speed driver development and SoC verification
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Feb 25, 2014
ZeBu Server-3 speeds hardware-software bring-up, OS boot and SoC verification by up to 4X for faster time-to-market on even the largest designs
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Feb 24, 2014
Pre-Verified Hardware and Software Platforms Integrate ARC Processors, Peripherals, Operating Systems and Software Development Tools to Enable Immediate Productivity
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Feb 19, 2014
Coverity Improves Code Quality and Security, Resulting in Better Software, Faster
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Feb 19, 2014
Q1 2014 Financial Highlights
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Feb 12, 2014
Realtek's Chip Achieves First-Pass Silicon Success Using Broad Portfolio of DesignWare Logic Libraries and Embedded Memories in UMC's 40-nm Process