Press Releases

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• Dec 4, 2019

  Synopsys Posts Financial Results for Fourth Quarter and Fiscal Year 2019

  Q4 2019 Financial Highlights
• Nov 18, 2019

  Synopsys Custom Compiler Adopted by Samsung Foundry to Accelerate IP Design for 5LPE Process Technology with EUV Technology

  Samsung Releases 5LPE AMS Reference Flow Based on Synopsys Custom Design Platform
• Nov 15, 2019

  Synopsys Completes Acquisition of DINI Group
• Nov 13, 2019

  Synopsys Announces Earnings Release Date for Fourth Quarter and Fiscal Year 2019
• Nov 12, 2019

  Synopsys DesignWare ARC Data Fusion IP Subsystem Incorporated by Himax in Their Artificial Intelligence WiseEye ASIC

  Always-On Sensing ASIC Enables Machine Learning for Ultra-Low Power Applications
• Nov 11, 2019

  Samsung Foundry Deploys Industry-Leading Synopsys TestMAX XLBIST Dynamic In-System Test Solution for Automotive Safety

  Part of a Broader Collaboration for Functional Safety and Manufacturing Test to Achieve ASIL-D Level Design Safety
• Nov 11, 2019

  Synopsys to Acquire Certain IP Assets from eSilicon

  Acquisition Will Expand DesignWare IP Portfolio and Add a Team of Experienced R&D Engineers to Serve Growing AI and Cloud Markets
• Nov 7, 2019

  Synopsys VC LP for Low Power Signoff Verification Delivers Up to 5X Runtime Gain at Samsung

  Signoff Abstract Model Flow for Hierarchical Verification Delivers Higher Performance and Capacity with No Loss in Quality of Results or Debug Visibility
• Oct 30, 2019

  Synopsys and AMD Execute Multi-Year ZeBu Emulation Agreement

  New Agreement Includes Optimization of ZeBu and VCS Software for AMD EPYC Processor-based Servers
• Oct 29, 2019

  Synopsys Accelerates Cloud Computing SoC Designs with New Die-to-Die PHY IP in Advanced 7nm FinFET Process

  DesignWare Die-to-Die PHY Enables Ultra- and Extra-Short Reach Connectivity in Large, Multi-Chip Module Designs
• Oct 29, 2019

  Synopsys Ships More Than 3,000 HAPS-80 Prototyping Systems

  HAPS-80's High Performance and Cost Effectiveness Has Driven Adoption by More Than 100 Companies
• Oct 28, 2019

  NSITEXE Achieves First-Pass Silicon Success for High-Performance Data Flow Processor-based SoC Test Chip Using DesignWare IP

  Silicon-Proven DesignWare Interface and Foundation IP Portfolios Lower Integration Risk and Accelerate Time to Market for Automotive Application
• Oct 23, 2019

  Astera Labs Accelerates PCI Express 5.0 System Deployment in Collaboration with Intel and Synopsys

  Astera Labs Delivers Industry's First Commercially Available PCIe 5.0 Retimer SoC
• Oct 22, 2019

  Synopsys Launches New ARC VPX DSP Processor IP for High-performance Signal Processing SoC Designs

  DesignWare ARC VPX5 and VPX5FS DSP Processors Incorporate Ultra-wide Vector Architecture to Accelerate Highly Parallel Automotive, Sensor Fusion, and Communications Applications
• 
  Oct 21, 2019

  TSMC Recognizes Synopsys with Four "Partner of the Year" Awards

  • Photos 1
• Oct 17, 2019

  Synopsys Design Platforms Enabled for Samsung Foundry 2.5D-IC Multi-Die Integration

  Synopsys and Samsung Foundry Collaboration Delivers Customized Solution to Support 5G, AI, and HPC Applications
• Oct 17, 2019

  Samsung Foundry and Synopsys Deliver Comprehensive Automotive Solutions for Autonomous Driving and ADAS
• Oct 15, 2019

  Synopsys Introduces Native Automotive Solutions Optimized for Efficient Design of Autonomous Driving and ADAS SoCs
• Oct 10, 2019

  GLOBALFOUNDRIES Qualifies Synopsys Fusion Design Platform on 12LP FinFET Platform
• Oct 7, 2019

  Synopsys, Arm, and Samsung Foundry Enable Accelerated Development of Next-Generation Arm "Hercules" Processor on 5LPE Process

  Certified Tools and Reference Flow Enable Early Adopters' Implementation of Advanced Arm Core
• Oct 7, 2019

  Synopsys Announces Industry-First Unified Functional Safety Verification Solution to Accelerate Time-to-Certification for IPs and SoCs

  VC Functional Safety Manager Reduces ISO 26262 FMEA/FMEDA and Fault Classification Effort by Up to 50 Percent
• Oct 4, 2019

  Synopsys to Showcase Optimized Solutions for Arm-based Designs at Arm TechCon 2019
• Oct 2, 2019

  Synopsys Completes Acquisition of QTronic GmbH
• Sep 30, 2019

  Synopsys Introduces PrimeECO Solution for Zero-Iteration Signoff-Driven Design Closure

  Native Integration of Physical Implementation Technology into Signoff Enables 10X Faster Single-machine Design Closure
• Sep 26, 2019

  Synopsys and TSMC Collaborate for Certification on 5nm Process Technologies to Address Next-generation HPC, Mobile Design Requirements

  Enhancements in Design and Verification Tools Target Gains in Performance and Ultra-low Power

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