Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
-
Dec 4, 2019
Q4 2019 Financial Highlights
-
Nov 18, 2019
Samsung Releases 5LPE AMS Reference Flow Based on Synopsys Custom Design Platform
-
-
-
Nov 12, 2019
Always-On Sensing ASIC Enables Machine Learning for Ultra-Low Power Applications
-
Nov 11, 2019
Part of a Broader Collaboration for Functional Safety and Manufacturing Test to Achieve ASIL-D Level Design Safety
-
Nov 11, 2019
Acquisition Will Expand DesignWare IP Portfolio and Add a Team of Experienced R&D Engineers to Serve Growing AI and Cloud Markets
-
Nov 7, 2019
Signoff Abstract Model Flow for Hierarchical Verification Delivers Higher Performance and Capacity with No Loss in Quality of Results or Debug Visibility
-
Oct 30, 2019
New Agreement Includes Optimization of ZeBu and VCS Software for AMD EPYC Processor-based Servers
-
Oct 29, 2019
DesignWare Die-to-Die PHY Enables Ultra- and Extra-Short Reach Connectivity in Large, Multi-Chip Module Designs
-
Oct 29, 2019
HAPS-80's High Performance and Cost Effectiveness Has Driven Adoption by More Than 100 Companies
-
Oct 28, 2019
Silicon-Proven DesignWare Interface and Foundation IP Portfolios Lower Integration Risk and Accelerate Time to Market for Automotive Application
-
Oct 23, 2019
Astera Labs Delivers Industry's First Commercially Available PCIe 5.0 Retimer SoC
-
Oct 22, 2019
DesignWare ARC VPX5 and VPX5FS DSP Processors Incorporate Ultra-wide Vector Architecture to Accelerate Highly Parallel Automotive, Sensor Fusion, and Communications Applications
-
-
Oct 17, 2019
Synopsys and Samsung Foundry Collaboration Delivers Customized Solution to Support 5G, AI, and HPC Applications
-
-
-
-
Oct 7, 2019
Certified Tools and Reference Flow Enable Early Adopters' Implementation of Advanced Arm Core
-
Oct 7, 2019
VC Functional Safety Manager Reduces ISO 26262 FMEA/FMEDA and Fault Classification Effort by Up to 50 Percent
-
-
-
Sep 30, 2019
Native Integration of Physical Implementation Technology into Signoff Enables 10X Faster Single-machine Design Closure
-
Sep 26, 2019
Enhancements in Design and Verification Tools Target Gains in Performance and Ultra-low Power