Press Releases
Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Feb 23, 2005Reduces Development Time of LCD TV Driver SoC by Half
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Feb 14, 2005VCS Native Testbench Migration Service Provides Access to Up to 5X Faster Verification Performance
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Feb 14, 2005Powerful Testbench Automation in Synopsys Discovery™ Verification Platform Enables NetSilicon to Achieve First-Silicon Success
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Feb 14, 2005Latest Release of VCS® Solution Extends Verification Performance and Effectiveness With New, Powerful Native Testbench Capabilities
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Feb 14, 2005Industry Leaders to Demonstrate Immediate Benefits of Using SystemVerilog for Advanced Verification
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Feb 9, 2005Advanced Hybrid Formal Verification Technology Awarded Top Honor in Design Verification Category
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Feb 7, 2005Builds on Market Leading DesignWare Hi-Speed USB IP Solutions
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Feb 2, 2005Customers Gain Access to EDA Industry's Most Extensive Linux Support
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Jan 31, 2005Synopsys' ASIC Compatible Design Flow Including DC FPGA and Formality Products and Professional Services Now Supports Altera's Stratix II and HardCopy II Families
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Jan 26, 2005VhdlCohen Publishes SystemVerilog Assertions Handbook
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Jan 24, 2005Galaxy Platform's Multi-Voltage Flow Enables Toshiba to Realize Power-Efficient Design
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Jan 18, 2005Major Commercial Foundry in China Endorses Synopsys Design Platforms
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Jan 11, 2005Synopsys' Complete RTL to Silicon Flow Was Key to Designing Complex Mixed-Signal ASICs
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Dec 21, 2004Strategic Supplier Award Cites Synopsys' Outstanding Solutions, Service and Support
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Dec 21, 2004Unique Symbolic Simulation Speeds Verification for Artisan's New Low-Power, High-Density Metro Platform Memories
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Dec 20, 2004First Foundry to Offer Yield-Enhancing AA-PSM Technology in Volume Production Environment
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Dec 13, 2004Galaxy Delivers Fast, Accurate Signal Integrity Closure for Today's Largest, Most Complex Designs
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Dec 6, 2004Over 25,000 DesignWare Library Users Gain Access to Verification IP for Next-Generation On-Chip Interconnect
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Dec 1, 2004Outstanding Litigation to Be Settled at Closing
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Nov 30, 2004Sasken Flow Delivers a Time to Market Advantage for Customers by Accelerating Design Convergence
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Nov 18, 2004New Compute Platform Enables Customers to Address Tough Design Challenges
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Nov 2, 2004Experienced IP Engineers to Help Meet Demand for Synopsys' DesignWare Mixed-Signal IP
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Nov 1, 2004Synopsys' Industry Leading Standards-based IP Significantly Shortens Design Cycles and Helps to Reduce Risk
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Oct 27, 2004Magellan Enables Rapid and Thorough Block-Level Verification
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Oct 26, 2004SoCBIST Solution Enables More Transition Fault Detection and Higher QoR on High-Volume Printer Chips
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Oct 26, 2004Galaxy 2004 Delivers Higher Test Quality Through Bridging Fault Support in TetraMAX DSMTest
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Oct 19, 2004Top Customers Present Latest Success With Synopsys Test Solution at 12th Annual SIG Event
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Oct 18, 2004Leading Combined Solution Includes Endpoint, Root, Dual Mode and Switch Port Cores
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Oct 18, 2004Proteus' Unique Distributed Processing Accelerates Time to Yield
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Oct 12, 2004Synopsys Extends Popular Liberty and SDC Open Source Formats
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Oct 11, 2004Combination of Synopsys DFM Solutions and ISE TCAD Software Helps Chip Designers Improve Yield and Speed Time to Market
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Oct 4, 2004Optimization and Analysis Solution Results in Improved Productivity, Fewer Re-Spins and Reduced Time to Market
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Oct 4, 2004Reliable Timing Closure, Tight Tool Integration Key to Complex Designs' Success
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Sep 29, 2004Synopsys' ASIC Strength Flow Ideal for Designers Prototyping With Complex Xilinx Devices
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Sep 20, 2004NanoSim Speeds Analog-RF Circuit Verification Throughput by 10X
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Sep 17, 2004Magma's Patent Assertion Letter to Synopsys Triggers Response
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Sep 14, 2004Proteus OPC Decreases Turn Around Time Using Distributed Processing
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Sep 14, 2004Tighter Links Between Software and Manufacturing Accelerate Time to Yield
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Aug 31, 2004Galaxy and Discovery Platforms, IP and Professional Services Included in Multi-Million Dollar Agreement
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Aug 30, 2004Multi-Year License Agreement Gives Samsung Access to Broad Portfolio of DesignWare IP
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Aug 30, 2004Silicon-Proven PHY Cores Expand Industry-Leading DesignWare USB IP Portfolio
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Aug 23, 2004Tested, Integrated IP Reduces Risk, Shortens Time to Market for PCI Express Designers
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Jul 19, 2004Star-RCXT Delivers Silicon-Accurate Parasitic Extraction for Advanced Technologies
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Jul 19, 2004DesignWare PCI Express PHY Area 50% Smaller Than Competing Solutions
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Jun 29, 2004Advanced EDA Tools, IP and Training Will Help the IT-SoC Promotion Group of KIPA Achieve Its Technology Leadership Mission
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Jun 28, 2004Synopsys Responds to Customer Demand by Opening Popular Saber MAST Language
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Jun 22, 2004Dr. Aart de Geus Recognized Among Top Silicon Valley Innovators
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Jun 21, 2004Integration of Synopsys System Studio and Virtio Software Models to Reduce SoC Design Cycle; Synopsys Makes Equity Investment in Virtio
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Jun 21, 2004Technical Seminar Shows Users How to Achieve 2X Power Reduction and Power Integrity Sign-off
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Jun 14, 2004DesignWare IP Speeds Development of Ethernet Controller with PCI Express Interface
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Jun 9, 2004Award Honors Achievements in EDA Interoperability
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Jun 8, 2004Industry Leaders Team Up To Provide Unified Solution for FPGAs, Structured ASICs and ASICs
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Jun 7, 2004New DesignWare AMBA Connect Automates IP Selection, Configuration, Assembly, Simulation and Synthesis
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Jun 7, 2004Tool Enables Designers to Rapidly Configure and Assemble SoCs From Pre-Designed and Packaged IP Blocks
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Jun 7, 2004Synopsys Galaxy Power Enables ARM, IBM and NVIDIA to Realize Power-efficient Designs
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Jun 7, 2004Builds On Successful DesignWare AMBA 2.0 Solution
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Jun 7, 2004Reference Flow adds Galaxy Design Platform's Low Power Optimization, Advanced Flip Chip and Design for Manufacturing Capabilities
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Jun 3, 2004Company Leads in Convergence of Key Technologies for Design, Verification, IP and DFM
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Jun 2, 2004Agreement Increases Usage of Synopsys Products at Philips and Expands to Power Management and Design-for-Testability
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Jun 1, 2004HSPICE Achieves Up to 20X Performance Improvement and Supports High Frequency And RF Designs
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May 26, 2004Renesas Technology Expands Its Commitment to Galaxy Design Platform to Improve Turnaround Time
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May 25, 2004Expanded Testbench and Assertion Capabilities Find Complex Design Bugs and Deliver Significant Performance Improvement
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May 24, 2004Complete RTL to Production-Ready GDSII Capability for IBM-Chartered Cross- Foundry Design Enablement Program
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May 17, 2004Galaxy 2004 Accelerates Design Convergence Through Correlation With Sign-Off in the Platform
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May 11, 2004More Than 25,000 DesignWare Library Users Gain Access to Philips' Ultra-low Power DSP Core Through Star IP Program
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May 10, 2004SiVL Helps Prevent Months of Product Delay Through Accurate, Comprehensive Lithography Verification
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Apr 27, 2004Astro Plays Key Role in Boosting Toshiba's Design Productivity
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