Press Releases
Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Jun 4, 2020High-Quality DesignWare Security IP Protects Against Security Threats for Connected Devices
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Jun 3, 2020Successful Tapeout of the DesignWare USB4 PHY Test Chip on 5nm Process Reduces Risk and Accelerates Time-to-Market for SoCs Supporting the 40 Gbps USB Specification
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Jun 1, 2020More than 100 customers have adopted Design Compiler NXT since its introduction one year ago
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Jun 1, 2020Synopsys Solutions Deliver Multi-gigahertz Performance with Lowest Power and Area for Baikal-M1000 Processor Designs
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May 28, 2020DesignWare DDR IP Delivers High Performance Memory Interface for Compute-Intensive Artificial Intelligence Applications in Multiple Silicon Processes Including 7-nm
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May 26, 2020Synopsys Design and Verification Platforms and DesignWare Interface IP Enable Optimized Power, Performance and Area and Faster Time to Market
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May 22, 2020Synopsys solution deployed at Panasonic for all analog, mixed-signal & RF designs
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May 21, 2020Accelerated Software Development by More Than Two Months
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May 20, 2020Q2 2020 Financial Highlights
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May 18, 2020Strategic collaboration with TSMC delivers additional gains in performance and ultra-low power, and accelerates the path to next-generation designs
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May 12, 2020Analysis of more than 1,250 commercial codebases finds that open source security, license compliance, and operational risk remains widespread
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May 11, 2020High-Quality DesignWare Interface and Foundation IP Deliver Leading Power, Performance and Area
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May 1, 2020Synopsys Placed in Highest and Furthest Overall Position for its Ability to Execute and Completeness of Vision Two Years in a Row
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Apr 28, 2020Unique platform delivers automation and visualization for 2.5D/3D package design and implementation, with power, thermal, and noise-aware optimization
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Apr 23, 2020Content, now available, includes video from Synopsys co-CEO Aart de Geus discussing SNUG and new product introductions
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Apr 13, 2020ZeBu's Performance Enabled First Silicon Success of Tensor Streaming Processor Architecture
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Apr 7, 2020DesignWare ARC HS6x Processors Based on New 32/64-bit ARCv3 Instruction Set Architecture Extend Addressable Memory, Scale Up To 12 Cores
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Apr 6, 2020Synopsys' Prototyping Solutions Enable Faraday Customers to Accelerate Time-to-Market with Concurrent Hardware and Software Development
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Apr 2, 2020Broad Deployment of Synopsys' Fusion Design Platform Accelerating Delivery of Market-shaping Solutions
Mar 31, 2020DesignWare PHY and Controllers Operate at Up to 24 Gb/s for High-Performance Imaging and Automotive SoCs
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