Press Releases

Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.

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• Oct 20, 2020

  Breakthrough Synopsys IC Validator Technologies Deliver Faster Physical Signoff Convergence

  New Elastic CPU, Explorer LVS, and Machine Learning Features Deliver Accelerated Time-to-Results for Automotive, High-Performance Computing, AI, Networking and Wireless Applications
• Oct 19, 2020

  Synopsys Accelerates Power Electronics System Design with Virtual Prototyping Solution

  SaberEXP Delivers Fastest Convergence for Early Power Component Design and Seamless Export to High-Fidelity System Validation
• Oct 14, 2020

  Synopsys and Samsung Foundry Announce Reference Flow for Predictable Execution of ASIL D-Compliant SoC Design for Automotive Applications

  Comprehensive Flow Implements Synopsys' Functional Safety Processor IP for Efficient Development of Autonomous Driving and ADAS SoCs
• Oct 14, 2020

  Synopsys and SiMa.ai Collaborate to Bring Machine Learning Inference at Scale to the Embedded Edge

  Engagement Leverages Synopsys' DesignWare IP, Verification Continuum, and Fusion Design Solutions to Accelerate Development of SiMa.ai MLSoC Platform
• Oct 13, 2020

  Synopsys Demonstrates Industry's First PCI Express 5.0 IP Interoperability with Intel's Future Xeon Scalable Processor

  Successful Interoperability Enables Low-Risk Integration and Broad Adoption of the PCIe 5.0 Interface in High-Performance Computing SoCs
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  Oct 12, 2020

  Synopsys to Enable New Levels of Insight into SoC Designs and Systems with Industry's First Silicon Lifecycle Management Platform

  Data-Analytics-Driven Platform Enables Critical Improvement in Performance, Reliability, Functional Safety and Security

  • Photos 1
• Oct 12, 2020

  Synopsys Names Shankar Krishnamoorthy General Manager of the Digital Design Group
• Oct 12, 2020

  Synopsys IC Compiler II Delivers First-Pass Silicon Success for Graphcore's Multi-Billion Gate AI Processor

  Innovative AI-Hardware Design Technologies Accelerate Time-to-Market for Second-Generation 7nm Colossus IPU
• Oct 8, 2020

  Synopsys DesignWare CXL IP Supports AMBA CXS Protocol Targeting High-Performance Computing SoCs

  High-Bandwidth IP Solution Extends CXL Capabilities to Arm-Based Multi-Processor Core Designs
• Oct 8, 2020

  Synopsys' Digital Design Technology Symposium to Showcase Latest Innovations for AI, Automotive, HPC and 5G Chip Design

  Virtual Event to Highlight Unique Solutions, Methodologies and Techniques Used to Overcome Complex Design Challenges
• Sep 30, 2020

  Synopsys Delivers Industry's First Processor IP Certified for Full ISO 26262 ASIL D Compliance

  DesignWare ARC EM22FS Functional Safety Processor IP Meets ASIL D Random Plus ASIL D Systematic Compliance to Accelerate Automotive SoC-Level Certification
• Sep 28, 2020

  Synopsys to Host Panel on AI for Chip Design at AI Hardware Summit 2020

  Moderated by Industry Analyst Karl Freund of Moor Insights
• Sep 24, 2020

  Synopsys and GLOBALFOUNDRIES Collaborate to Expand Fusion Compiler Benefits for Latest Platforms

  Synopsys' Unique Product Delivers Best-in-Class PPA to Accelerate Innovation on GF Platform Offerings for Aerospace and Defense, Automotive and Cloud/AI Applications
• Sep 24, 2020

  Synopsys and GLOBALFOUNDRIES Collaborate to Develop Broad Portfolio of DesignWare IP for 12LP+ FinFET Solution

  DesignWare IP Delivers Significant Performance and Power Advantages for Cloud Computing and Edge AI SoCs on GF 12LP+ Solution
• Sep 16, 2020

  NSITEXE Successfully Develops Multiple Custom Processors for Automotive Applications in Half the Time with Synopsys ASIP Designer Tool

  ASIP Designer Tool Provides Rapid Architectural Exploration and Automatic Generation of Software Development Kits to Accelerate Design Time
• Sep 15, 2020

  Synopsys Publishes BSIMM11 Study Highlighting Fundamental Shifts in Software Security Initiatives in Response to DevOps and Digital Transformation

  The 11th iteration of the Building Security In Maturity Model reflects how organizations are adapting their software security efforts to support modern software development paradigms
• Sep 10, 2020

  DSP Group Selects Synopsys' ARC EM Processor IP for Adaptive Processing Smart Codecs

  Integration of DSP-Enhanced ARC Processor Enables Deployment of Advanced Sound Processing Features in Next-Generation Headsets
• Sep 9, 2020

  Synopsys Introduces the Industry's First Unified Electronic and Photonic Design Platform

  Synopsys OptoCompiler Enables Fast, Easy and Scalable Photonic IC Development
• Sep 3, 2020

  Synopsys and Nestwave Collaborate to Develop a Low-Power Geolocation IP Solution for IoT Modems

  Combination of Synopsys' ARC IoT Communications IP Subsystem with Nestwave's Geolocation IP Eliminates the Need for a Dedicated Positioning Chipset
• Sep 2, 2020

  Synopsys to Present at D.A. Davidson Technology Conference
• Sep 2, 2020

  Synopsys Appoints Jeannine Sargent to Board of Directors
• Sep 1, 2020

  Synopsys and Elektrobit Announce Availability of EB tresos Classic AUTOSAR Software for ARC Functional Safety Processor IP

  Elektrobit is the First Automotive Software Company to Collaborate with Synopsys on Providing Software for Synopsys ARC Functional Safety Processors Used in Automotive ECUs
• Aug 27, 2020

  Chelsio Adopts Synopsys DesignWare 56G Ethernet PHY IP to Accelerate Development of High-Performance Computing SoC

  Silicon-Proven 56G Ethernet PHY Delivers True Long Reach Performance with Flexible Data Rates and Low Latency
• Aug 25, 2020

  Synopsys, Customers and Partners Present the Latest Innovations in Embedded Processor Solutions at the Synopsys ARC Processor Virtual Summit

  Attendees Can Explore Processor IP Solutions that Accelerate SoC Development for Automotive, Artificial Intelligence, IoT and High-Performance Embedded Applications
• Aug 25, 2020

  Synopsys and TSMC Accelerate 2.5D/3DIC Designs with Chip-on-Wafer-on-Substrate and Integrated Fan-Out Certified Design Flows

  Synopsys 3DIC Compiler platform reduces design turnaround time for chip-package co-design implementation

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