Press Releases

Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.

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• Oct 26, 2004

  Synopsys Galaxy Test Reduces Test Data Volume by 40x and Application Time by 13x at STMicroelectronics

  SoCBIST Solution Enables More Transition Fault Detection and Higher QoR on High-Volume Printer Chips
• Oct 26, 2004

  NVIDIA Adopts Synopsys' Physically Aware Test Solution for Latest Processor Designs

  Galaxy 2004 Delivers Higher Test Quality Through Bridging Fault Support in TetraMAX DSMTest
• Oct 19, 2004

  Synopsys Showcases Galaxy 2004 Unified Design-for-Test Solution at International Test Conference

  Top Customers Present Latest Success With Synopsys Test Solution at 12th Annual SIG Event
• Oct 18, 2004

  Synopsys Acquires Cascade, Completing PCI Express IP Portfolio

  Leading Combined Solution Includes Endpoint, Root, Dual Mode and Switch Port Cores
• Oct 18, 2004

  HHNEC Standardizes on Synopsys' Proteus OPC Software to Reduce Mask Synthesis Turn-Around-Time

  Proteus' Unique Distributed Processing Accelerates Time to Yield
• Oct 12, 2004

  Synopsys' 14th EDA Interoperability Developers' Forum Features Widest Range of Industry Initiatives

  Synopsys Extends Popular Liberty and SDC Open Source Formats
• Oct 11, 2004

  Synopsys Strengthens Design-for-Manufacturing Offerings With Planned Acquisition of Integrated Systems Engineering AG

  Combination of Synopsys DFM Solutions and ISE TCAD Software Helps Chip Designers Improve Yield and Speed Time to Market
• Oct 4, 2004

  Microchip Technology Saves Weeks in Analog Design Time With Synopsys' Circuit Explorer

  Optimization and Analysis Solution Results in Improved Productivity, Fewer Re-Spins and Reduced Time to Market
• Oct 4, 2004

  BAE Systems Uses Synopsys' Galaxy Design Platform to Achieve Success on 24 Radiation-Hardened Space-Qualified ASICs

  Reliable Timing Closure, Tight Tool Integration Key to Complex Designs' Success
• Sep 29, 2004

  Synopsys' Design Compiler FPGA and Xilinx Virtex-4 FPGAs Target Complex ASIC Prototype Applications

  Synopsys' ASIC Strength Flow Ideal for Designers Prototyping With Complex Xilinx Devices

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