Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
-
-
Nov 1, 2005
DFT MAX Achieves 90% Test Data Volume Reduction for Flat Display TV Controller
-
Oct 31, 2005
Exar Develops and Deploys Advanced SystemVerilog Verification Environment and Reference Model with VCS® Native Testbench Technology
-
-
-
Oct 24, 2005
TetraMAX Diagnostics Enable TSMC to Accelerate Yield Ramp on Deep Submicron Designs
-
Oct 19, 2005
Advanced Testbench Techniques Critical for Multi-Protocol Verification Environment at Chip and System Levels
-
Oct 19, 2005
Project Methodology Leverages Assertions, Functional Coverage, Constrained-Random Stimulus Generation and PCI Express® Verification IP
-
Oct 17, 2005
Sentaurus Sets New Standard in TCAD Simulation Capabilities for Semiconductor Process, Device, Circuit and System Analysis, and Parametric Yield Optimization
-
Oct 10, 2005
Communications Leader Uses Synopsys' Tools and Flows From Design Through Physical Implementation
-
Oct 4, 2005
ARM and Synopsys Collaborate to Demonstrate Galaxy Design and Discovery Verification Flow for ARM Cortex-A8 Processor Implementation
-
Oct 4, 2005
Comprehensive Design Kit for X-FAB's 0.6-Micron Process Improves Quality and Speeds Time to Market
-
Oct 4, 2005
Accurate OPC Modeling Critical for Accelerating Time to Yield
-
Oct 3, 2005
New, Accurate Model Speeds Time to Results by 2X
-
Oct 3, 2005
Acquisition Will Establish EDA Industry's First Direct Connection into Fabrication Processes
-
Oct 3, 2005
Enhanced Reference Methodology delivers 10 percent higher performance
-
Oct 3, 2005
Synopsys and Dassault Partner to Provide Improved Electro-Mechanical Design
-
Sep 26, 2005
Mixed -Signal IP Complements Synopsys' Market-Leading Portfolio of Serial Interface Controllers
-
Sep 26, 2005
Verification IP Product Combines with Advanced Methodologies and Tools to Deliver a High-Performance Integrated Verification Environment
-
Sep 26, 2005
Testing Conducted With Synopsys' Wireless USB Device Controller IP and Alereon's WiMedia Ultra-Wideband PHY
-
Sep 26, 2005
Companies Lead Industry With Hardware and Software Interoperability Testing
-
Sep 26, 2005
Early IP Availability From Synopsys Drives Wireless USB Integration Into Next Generation SoCs
-
Sep 26, 2005
Pioneer-NTB Delivers Standards-Based, Mixed-HDL Verification Built on Synopsys' Proven VCS® Technology
-
Sep 21, 2005
Automated Macro Placement and Power Network Synthesis Reduces Design Planning Time Up to 10x
-
Sep 21, 2005
Verification Effort Reduced With Certified DesignWare Verification IP