Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Jan 9, 2020
Virtualizer Development Kit Deployed at NXP, Tier 1, OEMs, and Software Ecosystem Vendors 18 Months Before Silicon Availability
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Jan 7, 2020
Acquisition Broadens DesignWare IP Portfolio and Adds a Team of Experienced R&D Engineers to Accelerate Physical IP Development
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Jan 7, 2020
New Low-Power Codec Optimized for Synopsys' ARC Processor IP Enables High-Quality Audio and Voice Streaming from Smart Home, Mobile, and Wearable Devices
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Dec 20, 2019
Enables Hardware and Software Teams to Optimize Software Performance Within Four Weeks
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Dec 19, 2019
A Holistic Solution Catalyzing Sustainable Gains in Engineering Quality, Speed, and Efficiency for Integrated Automotive Systems
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Dec 17, 2019
CODE V Version 11.3 Extends Optical Engineering Leadership with New Features for CAD Modeling, Freeform Optics Design, and Project Management
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Dec 12, 2019
ISO 26262 ASIL Compliant ARC EM Processor IP Enables Calterah to Accelerate Safety Certification for Next-Generation Millimeter Wave Radar Chip
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Dec 4, 2019
Q4 2019 Financial Highlights
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Nov 18, 2019
Samsung Releases 5LPE AMS Reference Flow Based on Synopsys Custom Design Platform
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Nov 12, 2019
Always-On Sensing ASIC Enables Machine Learning for Ultra-Low Power Applications
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Nov 11, 2019
Part of a Broader Collaboration for Functional Safety and Manufacturing Test to Achieve ASIL-D Level Design Safety
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Nov 11, 2019
Acquisition Will Expand DesignWare IP Portfolio and Add a Team of Experienced R&D Engineers to Serve Growing AI and Cloud Markets
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Nov 7, 2019
Signoff Abstract Model Flow for Hierarchical Verification Delivers Higher Performance and Capacity with No Loss in Quality of Results or Debug Visibility
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Oct 30, 2019
New Agreement Includes Optimization of ZeBu and VCS Software for AMD EPYC Processor-based Servers
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Oct 29, 2019
DesignWare Die-to-Die PHY Enables Ultra- and Extra-Short Reach Connectivity in Large, Multi-Chip Module Designs
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Oct 29, 2019
HAPS-80's High Performance and Cost Effectiveness Has Driven Adoption by More Than 100 Companies
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Oct 28, 2019
Silicon-Proven DesignWare Interface and Foundation IP Portfolios Lower Integration Risk and Accelerate Time to Market for Automotive Application
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Oct 23, 2019
Astera Labs Delivers Industry's First Commercially Available PCIe 5.0 Retimer SoC
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Oct 22, 2019
DesignWare ARC VPX5 and VPX5FS DSP Processors Incorporate Ultra-wide Vector Architecture to Accelerate Highly Parallel Automotive, Sensor Fusion, and Communications Applications