Press Releases
Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Mar 12, 2015Native SystemVerilog-based VIP for SoundWire Expands Portfolio of VIP for Mobile Applications and Offers Built-in Coverage, Verification Plan and Protocol-aware Debug
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Mar 10, 2015Vast Majority of Designers Choose Synopsys Implementation Tools for Move from Test Chips to Production Tapeout
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Mar 10, 2015Successful Tapeouts Include the Newly Announced 64-bit ARM Cortex-A72 Processor-based SoC
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Mar 9, 2015Toshiba Standardizes on IC Compiler II for Physical Design
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Mar 5, 2015Virtualizer Development Kit Speeds Software Development, Integration and Test
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Mar 2, 2015Combination of Synopsys' Sensor and Control IP Subsystem with ARC EM Processor and Hillcrest Labs' Freespace MotionEngine Software Enables Power-Efficient Sensor Processing for Mobile and Wearable Devices
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Mar 2, 2015Sensory TrulyHandsfree Voice Control Software Optimized for Synopsys' DesignWare ARC EM5D Processor Consumes as Little as 0.9 Microwatts in Detection Mode and 40 Microwatts in Recognition Mode
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Feb 26, 2015Online Access to Open Source Drivers, Operating Systems and Middleware Expands Ecosystem Support for Software Developers Implementing ARC Processor-based Designs
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Feb 18, 2015Q1 2015 Financial Highlights
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Feb 12, 2015Virtualizer Development Kit (VDK) Enables Tier 1 and OEM Companies to Start Development Early and Improve Software Quality for RH850-based MCU Designs
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Feb 11, 2015Performance Analysis Tool Accelerates Optimization of Address Mapping, Clock Frequency and Quality of Service for DesignWare DDR Memory Controller
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Feb 3, 2015Synopsys' Design Solutions Enable Realization of Premium Mobile Experience with ARM's New Suite of IP
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Feb 3, 2015Native SystemVerilog Ethernet VIP and Source Code Test Suites Enhanced with Built-in-Coverage and Support for Protocol-aware Debug
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Jan 29, 2015An Alternative to Embedded Flash Memory, NVM IP Eliminates Need for Extra Masks or Processing Steps for Analog ICs
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Jan 22, 2015Complete HDMI IP Solution with HDCP 2.2 Certification Meets Highest Security Standards for Ultra-High Definition Multimedia SoCs
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Jan 15, 2015Accelerated Project Schedule for Mobile Application Processor SoC with DesignWare USB, HDMI and MIPI IP
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Dec 17, 2014Adopted by More than 70 Semiconductor Companies with Over 50 Tapeouts in First 9 Months
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Dec 16, 2014Enables Delivery of Accurate Sentaurus TCAD Models for Nanowire, FinFET and Tunnel-FET Transistors
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Dec 10, 2014Apache Hadoop, HBase, Cassandra Among Leading Projects Making Steady Progress
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Dec 9, 2014Native SystemVerilog-based Memory VIP Portfolio Expanded to Support JEDEC LPDDR4 with Built-in Coverage, Verification Plan and Protocol-aware Debug
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Dec 8, 2014HAPS FPGA-based Prototyping Systems Help More Than 400 Companies Accelerate Time to First Prototype and Avoid Costly Device Re-Spins
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Dec 8, 2014LightTools 8.2 Now Generally Available
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Dec 8, 2014Top Semiconductor Companies Quickly Adopting IC Compiler II to Tapeout Across Range of Technology Nodes
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Dec 4, 2014Virtualizer Enables Faraday Design Services' Customers to Start Software Development up to 12 Months before Hardware Availability
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Dec 3, 2014Trac Pham Appointed Chief Financial Officer
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Dec 3, 2014Q4 2014 Financial Highlights
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Nov 19, 2014IP Prototyping Kits Enable Designers to Accelerate Prototyping, Software Development and Integration of IP into SoCs
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Nov 18, 2014Reduced Congestion and MCMM Synthesis Cut Weeks from Schedule
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Nov 17, 2014Synopsys DRC and LVS Signoff Has Speed and Capacity to Handle Huge Flexible Screen Devices
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Nov 11, 2014High-Quality DesignWare IP, Verification IP and Galaxy Design Platform Tools Deliver Lower Power, Smaller Area and Faster Time-to-Market for Wi-Fi Networking SoC
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Nov 10, 2014CODE V 10.7 Now Generally Available
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Nov 6, 2014Processor Designer Tool Enables KYOCERA Design Team to Reduce Overall Project Schedule by Nine Months
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Nov 5, 2014Better Software. Faster! Book Details Methodology Enabling Developers to Achieve Early Software Development before Hardware Availability
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Oct 30, 2014Silicon-Proven, Reprogrammable NVM IP Delivers Smallest Area for Calibration and Trimming Applications
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Oct 29, 2014Integrated IP Subsystem, Including ARC EM DSP Processors, Floating Point Unit and Control Peripherals, Improves Performance, Energy Consumption and Design Flexibility
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Oct 28, 2014Industry-First Solution Includes DesignWare USB 3.1 Controller, IP Virtual Development Kit and Verification IP
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Oct 28, 2014Success Drives Panasonic SoC Adoption of IC Compiler II
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Oct 27, 2014VC Apps Open APIs Automate Memory Testbench Generation and Debug
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Oct 27, 2014Synopsys Synplify Pro Synthesis Tool Delivers Superior Quality of Results for Users of Gowin Semiconductor FPGAs
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Oct 21, 201428-nm Runset Availability Enables Signoff Physical Verification for Mutual Customers
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Oct 21, 2014New Multi-Memory Bus Processor Cuts Test Logic in Half While Maintaining High Performance for Networking SoC
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Oct 20, 2014DesignWare STAR Memory System for Embedded Flash Reduces Test Cost by 20 Percent and Enables In-Field Diagnostics for IoT and Automotive SoCs
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Oct 20, 2014Standardizes on DFTMAX Ultra for Designs with Few Test Pins
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Oct 15, 2014OWASP and C# Capabilities in Coverity Scan Expanded to Support Open Source Community
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Oct 14, 2014Successor to Popular ARC 770D Core Delivers Significant Performance Increase, Support for 40-bit Physical Addresses and L2 Cache
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Oct 11, 2014
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Oct 8, 2014Achieves Single-pass Timing and Power ECO Closure on Multiple Tapeouts Including FinFET
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Oct 7, 2014Native SystemVerilog-based VIP for PCI Express architecture now supports M-PCIe technology, with built-in coverage, verification plan and protocol-aware debug
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Oct 1, 2014Power Savings Enabled by Unique Techniques and Design Flow Supported by Design Compiler Graphical, IC Compiler and PrimeTime Tools
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Sep 30, 2014Single, unified Liberty variation format standardized by the IEEE Industry Standards Board
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Sep 30, 2014Collaboration Enables Best Practices for Custom Implementation Productivity with FinFET Devices
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Sep 29, 2014Industry Leaders Sign Multi-year Subscription Agreement to Accelerate Design and Verification of ARM-based SoCs using Synopsys Tools
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Sep 25, 2014Certification of Digital and Custom Tools Enables Early Adopters to Realize QoR Benefits of the New Processes
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Sep 23, 2014Next-Generation Verification Platform to Accelerate Time-to-Market by Months
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Sep 22, 2014New Innovations Also Reduce Leakage Power and Accelerate Design Schedules
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Sep 18, 2014
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Sep 18, 2014High-Quality, Silicon-Proven IP Accelerates Project Schedule by Four Months in Highly Competitive Mobile Market
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Sep 17, 2014Native SystemVerilog-based MIPI C-PHY Verification IP Broadens Synopsys' VIP Portfolio Enabling Verification of Full Family of MIPI Alliance PHY Options
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Sep 17, 2014Latest Release Delivers Higher Performance and Lower Power for Advanced Design
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Sep 17, 2014Industry-First Support for MIPI D-PHY v1.2 Specification Increases Performance to 2.5 Gbps While Lowering Cost for Image Sensor and Display Applications
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Sep 15, 2014Selection of Synopsys' Solutions Based on Superior Results for Analog Mixed-signal Designs
- Sep 10, 2014Native SystemVerilog-based VIP Used in Advanced Testbench Methodology Environment to Address SoC Verification Challenges
- Sep 10, 2014Expands Capabilities of RSoft OptSim to Accelerate Design of PIC-enabled, High-performance Optical Telecommunications Systems
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Aug 25, 2014Annual Competition Recognizes Student Achievements in Optical Design
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Aug 21, 2014Use of Silicon-Proven DesignWare USB IP by More than 60 Companies Demonstrates High Quality and Low Integration Risk
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Aug 20, 2014Q3 2014 Financial Highlights
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Jul 15, 2014Native SystemVerilog Ethernet 1G/10G/40G/100G VIP now includes UNH compliance source-code test suite
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Jul 8, 2014New Trim NVM IP Leverages Faster Programming Times to Reduce NVM Test Time by 3X Without Compromising AEC-Q100 Quality
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Jul 8, 2014Protocol test suites in SystemVerilog source code accelerate compliance testing of Ethernet, USB, PCI Express, ARM AMBA AXI and MIPI CSI-2 protocols
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Jun 30, 2014Collaboration enables stochastic modeling of device degradation and reliability through industry leading Sentaurus Device TCAD simulator
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Jun 24, 2014Production-Ready DesignWare IP for TSMC 28HPC Process Enables Designers to Reduce Power Consumption and Area for Mobile and Ultra Low-Power IoT Designs
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Jun 23, 2014New Program Provides Prototypers with Daughter Boards and Services from Synopsys-Approved Third Party Providers
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Jun 17, 2014Latest innovations drive tighter collaboration between Development and QA, enabling organizations to develop and deliver better software, faster.
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Jun 4, 2014Synopsys Galaxy Design Platform Enables Designers to Take Full Advantage of High-Performance and Low Power of 28-nm FD-SOI
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Jun 4, 2014Leading technology provider for the oil and gas industry to share software testing best practices on webcast
- Jun 3, 2014Extends Production-Proven 22-nm Design Enablement to 14-nm for Cloud Infrastructure and Mobile Market Segments
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Jun 3, 2014DDR and LPDDR Verification IP Now Broadly Available
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Jun 3, 2014New Formal Verification, Clock Domain Crossing and Low Power Static Checking Products Offer 3X to 5X Performance and Capacity, Ease-of-use and Advanced Debug Needed for Complex SoC Verification
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Jun 2, 2014New DesignWare IP Development Kits and Customized Subsystems Accelerate Prototyping, Software Development and Integration of IP into SoCs
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Jun 2, 2014FinFET-ready Silicon-proven Tools and IP Available for Immediate Design of SoCs
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May 29, 2014New ARC EM5D and EM7D Cores Combine High-Efficiency Control and Signal Processing to Minimize Energy Use in Sensor, Voice and Audio Processing Applications
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May 27, 2014Silicon Success of DesignWare USB 3.0 femtoPHY, Logic Libraries and Embedded Memories in TSMC 16-nm FinFET Process Verifies Robustness of Both IP and Process
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