Press Releases
Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Aug 21, 2019Q3 2019 Financial Highlights
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Aug 12, 2019Annual Competition Recognizes Student Achievements in Optical Design
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Aug 6, 2019Acquisition Expands Automotive Virtual Solutions to Accelerate Vehicle Systems and Software Development
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Aug 1, 2019Survey Conducted by Ponemon Institute Reveals More Than Half of Financial Services Organizations Have Experienced Theft of Customer Data Due to Insecure Software
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Aug 1, 2019Launches Campaign to Honor STEM Teachers in the San Francisco Bay Area
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Jul 18, 2019Synopsys ZeBu Virtual Tester Solution with Ixia IxVerify Enables Scalable, Flexible, and Accurate Validation of Complex Networking SoCs
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Jul 15, 2019Synopsys to Present Industry's First Fully Automated Technology for AMS Emulation at DARPA ERI Summit 2019
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Jul 11, 2019Realtek Deploys IC Compiler II for Its Next-generation Communications Network Design
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Jul 11, 2019IC Validator Delivers Superior Performance for DRC and LVS Signoff
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Jul 2, 2019Comprehensive Yield Learning Platform from Synopsys Enables Close Collaboration with Samsung and Its Fabless Customers During Production Ramp-up of New Products
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Jun 26, 2019Company Delivers on Its Commitment to Combat Climate Change
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Jun 24, 2019Collaboration for Third Generation Builds on Successful Deployment of VDKs for AURIX TC2x and TC3x Series to Enable Early Software Development at Tier1 and OEM Customers
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Jun 12, 2019Continuous Commitment to Development of High-quality DesignWare IP Lowers Risk and Accelerates Time-to-Market for SoC Designs
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Jun 5, 2019New Kit Provides Infrastructure for Checking, Reporting, and Packaging of ASIC Designs
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Jun 4, 2019AI-enhanced, Cloud-ready Platform with Fusion Technology Accelerates Next Wave of Industry Innovation
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Jun 4, 2019High-quality DesignWare Interface and Analog IP Optimized for High Performance and Low Power in AI, Cloud Computing, and Mobile SoCs
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May 30, 2019New Native Tool Integrations Enable up to 5X Higher Verification Performance
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May 30, 2019Industry's First Full-chip Implementation and Verification Completed Entirely on Amazon Web Services Cloud
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May 28, 2019Juniper Networks Achieves 14% Lower Power and 6% Smaller Area on Next-generation Networking Design
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May 28, 2019Breakthrough Technology Redefines Design Signoff by Leveraging Industry's Golden Timing Signoff and Machine Learning Technology to Accelerate Statistical Yield Analysis
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May 27, 2019Synopsys Design and Verification Platforms and DesignWare Interface IP Enable Optimized PPA and Faster Time-to-Market for Smartphones, Laptops, and Other Mobile Devices
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May 23, 2019Expanded Cloud-based Services Give SoC Designers More Scalability and Flexibility
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May 23, 2019VC Formal Datapath Validation Application Enables Broad Market Adoption of HECTOR Technology
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May 23, 2019New ZeBu Power Analyzer Enables Emulation-based Power Analysis for Billion-cycle Software Workloads Not Feasible with Traditional Methods
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May 22, 2019Q2 2019 Financial Highlights
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May 21, 2019ASIL D Ready Vision Processor with Safety Enhancement Delivers Highest Level of Functional Safety for Automotive SoCs
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May 20, 2019Combination of Synopsys' ARC EV6x Vision Processor IP and KudanSLAM Software Delivers Efficient and Accurate Machine Vision to AI, Automotive, and IoT Applications
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May 13, 2019Companies Shortening Automotive Development Cycle by Enabling Transition from Physical to Virtual System Testing
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May 7, 2019Fudan Microelectronics Group Selects Synopsys' DesignWare Bluetooth IP for Smart IoT System-on-ChipsSilicon-Proven, Compliant Bluetooth 5.0 IP Delivers Low Power and Small Area in Popular 40-nm IoT Process
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May 1, 2019QuickStart Implementation Kits Enhanced to Enable Fusion Compiler to Speed Implementation and Improve PPA for Arm-based SoCs
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May 1, 2019Native SystemVerilog VIP Features Built-in Coverage, Verification Planning, Memory-aware Debug, and Performance Analysis
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May 1, 2019EU Project PLASMOfab Successfully Completed
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Apr 30, 2019VESA DSC IP Interoperates with DesignWare HDMI 2.1, DisplayPort, and MIPI DSI IP to Minimize Integration Risk and Accelerate Time-to-Market
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Apr 30, 2019Study of more than 1,200 commercial applications and libraries finds a majority still contain open source security vulnerabilities and license conflicts
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Apr 23, 2019Close Collaboration Delivers Design Solutions for True 3D Device Integration
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Apr 23, 2019Synopsys Placed Highest for Ability to Execute and Furthest to the Right for Completeness of Vision
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Apr 23, 2019Proven Interface, Analog, and Foundation IP Has Enabled Customer Silicon Successes Across a Range of Applications
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Apr 22, 2019Production-ready Flow Enables High-performance Compute and Mobile Applications
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Apr 22, 2019Virtualizer Development Kits Allow Tier-1 Chinese Automotive Supplier to Start Software Development Earlier and Accelerate Testing
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Apr 18, 2019New Virtualizer Development Kit for ST Stellar Multicore MCU Deployed at Lead Automotive Tier 1 Companies Enabled Early Software Development
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Apr 8, 2019Black Duck by Synopsys Receives Highest Possible Score in the SDLC Integration, Policy Management, and Training criteria and Receives the Top Ranking in the Market Presence Category
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Apr 2, 2019
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Mar 27, 2019Using Synopsys Cloud Solution, Samsung Foundry's 7nm Library Characterization Has Been Significantly Accelerated
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Mar 20, 2019Redefines Expectations for Test, with Innovations in Early-RTL Test Integration, Automotive Functional Safety, and High-Bandwidth Test
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Mar 20, 2019Enables Lower Power, Higher Performance, and Faster Time-to-Market for 7nm Designs
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Mar 18, 2019Breakthrough Explorer DRC, Live DRC, and Fusion Technologies Deliver Unparalleled Productivity Gains
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Mar 14, 2019Fusion Compiler Continues Strong Deployment Momentum at Market-Leading Semiconductor Companies
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Mar 14, 2019Native SystemVerilog VIP for USB Features Built-in Coverage, Verification Plan, Protocol-Aware Debug, and Source Code Test Suites
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Mar 13, 2019Early Adopters Realizing Up to 2X Faster Runtime, 10% Improved QoR, and Tight Correlation to IC Compiler II
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Mar 12, 2019Version 8.7, Now Available, Enables Innovative Illumination Optics for Aerospace, Defense, Automotive, and Consumer Applications
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Mar 5, 2019Latest Design Features for Photonic Devices and Systems, PICs, and High-performance SoCs Drive Innovation
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Feb 27, 2019Enables Development of Isolated, Secure Environments for High-Performance Applications
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Feb 26, 2019Synopsys Expert to Present the Findings of a Recent Study Highlighting Critical Cybersecurity Risks in the Automotive Industry
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Feb 25, 2019Platform Enables Comprehensive Application Security from Developer to Deployment
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Feb 25, 2019Combination of Synopsys' ARC EM Processor with Palma Ceia's Silicon-Proven RF Transceiver Facilitates LTE Cat NB2 SoC Implementations
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Feb 21, 2019Synopsys' Portfolio of DesignWare Foundation, Analog, and Interface IP Accelerate ISO 26262 Qualification for ADAS, Powertrain, 5G, and Radar Automotive SoCs
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Feb 20, 2019Q1 2019 Financial Highlights
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Feb 20, 2019Close Collaboration Drives Continuous Innovation to Accelerate Next-generation Process Technology
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Feb 11, 2019Regulatory Certification Strengthens Inroads to Medical Simulation and Pre-surgical Planning Markets
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Feb 6, 2019Survey Conducted by the Ponemon Institute Reveals Automotive Manufacturers and Suppliers are Struggling to Incorporate Cybersecurity Best Practices Throughout Product Development Life Cycle
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Feb 4, 2019Portfolio of Silicon-Proven IP Meets Artificial Intelligence Processing, Memory, Connectivity, and Security Requirements while Accelerating Automotive Functional Safety Assessments
Jan 24, 2019Integrated Hardware-Software Platform Enables Developers to Rapidly Develop and Debug Software for ARC EM Processor-Based SoCs-
Jan 15, 2019Latest Product Release Bolsters Software Integrity Offering for Enterprise Security Teams
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Jan 14, 2019Silicon-Proven DesignWare IP for PCI Express 4.0 Delivers 16 GT/s Data Transfer Rate to Meet AI Inference Throughput Requirements
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Jan 9, 2019IC Validator Verifies Innovium's Flagship 12.8Tbps Network Switch
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Dec 19, 2018Manufacturing Challenges and Need for Ultra-low Power Drive Extensions to Liberty and Interconnect Technology Standards
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Dec 17, 2018RSoft Photonic Component Design Suite 2018.12 Now Available
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Dec 10, 2018Synopsys and imec Demonstrate Accelerated Modeling of Innovative Complementary FET (CFET) TechnologyPartnership Aims to Reduce Parasitic Variation at Sub-3nm Processes
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Dec 5, 2018Q4 2018 Financial Highlights
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Nov 8, 2018Synopsys Fusion Technology and Artificial Intelligence Solution Recognized with Product of the Year Awards
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Nov 7, 2018Accelerates InP-based PIC Design and Production
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Nov 6, 2018Innovative RTL-to-GDSII Product Redefines IC Design through Fusion of Synthesis and Place-and-Route
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Nov 6, 2018Design Compiler NXT Boosts Runtime by 2X, QoR by 5 Percent, and Provides Support Down to 5nm and Beyond
Oct 30, 2018DesignWare STAR Memory System Maximizes Manufacturing Yield with New Algorithms to Mitigate Defects in Embedded MRAM-based Designs-
Oct 29, 2018SpyGlass DFT ADV Guides Design Changes for Improved ISO 26262 Metrics
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Oct 29, 2018Accelerates Achieving Test Goals While Meeting Power, Performance, and Area Targets
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Oct 24, 2018New DesignWare Memory Interface IP Targets AI, Automotive, and Mobile SoCs
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Oct 23, 20183X Faster Analog Simulation and New Fusion Technologies Accelerate AMS Design
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Oct 23, 2018New Fusion Technologies Reduce Time to Analog Design Closure
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Oct 23, 2018Latest Release Accelerates Verification of Large, Advanced-node Post-layout Analog Designs
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Oct 17, 2018Expertise and Market-Leading Position in Emulation Being Brought to Bear, in Partnership with Lockheed Martin and Analog Devices
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Oct 16, 2018Synopsys' Design, Verification, Software Integrity, and IP Solutions Enable Power, Performance, Area, and Security Required for Server and Networking Products Based on Arm Neoverse IP
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