Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Jan 25, 2012
Combination of HSPICE and Sigrity Solution Delivers Up to 3X Speed-up for SI Analysis
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Jan 25, 2012
Processor Designer Doubles Functionality for XMP-1 Sound Generator Device while Reducing Development Cost
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Jan 18, 2012
Integrated Galaxy-Enabled Design Flow Accelerates Migration to 40-nm Technology
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Jan 3, 2012
Post-OPC Verification Tool Provides Highest Accuracy and Lowest Cost of Ownership
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Dec 14, 2011
GLOBALFOUNDRIES Tapeout Reinforces Synopsys IC Compiler as the Leading Choice for 20 Nanometers
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Dec 14, 2011
Standardizes on IC Compiler for High-Performance Processor Implementation
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Dec 8, 2011
Runset Availability Brings Benefits of In-Design Physical Verification to Mutual Customers
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Dec 5, 2011
Advanced Solution Now in Mainstream Usage with More Than 125 Successful Tapeouts
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Nov 30, 2011
Acquisition will complement Synopsys' technology, build on existing support capabilities and help accelerate advanced product delivery to customers
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Nov 30, 2011
Q4 2011 Financial Highlights
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Nov 16, 2011
Latest Releases of Certify and Identify Software Improve Prototype Performance and Accelerate Debug
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Nov 7, 2011
Technology Leadership and Outstanding Customer Support Cited as Key Selection Criteria
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Oct 26, 2011
High-performance, Low Power DesignWare 96 dB Hi-Fi Audio IP Optimized for Mobile Multimedia and Digital Home SoC Applications
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Oct 25, 2011
Comprehensive Solution Enables Rapid Ramp-up and Delivery of Advanced Custom IP
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Oct 18, 2011
CYIT Completes Tapeout Five Weeks Ahead of Schedule with First-Pass Silicon Success
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Oct 13, 2011
LG Electronics Adopts CustomSim for Mixed-signal SoC Verification
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Oct 12, 2011
Sixth Annual International Microelectronics Olympiad of Armenia Attracts Record 349 Contestants from Belarus, China, Germany, India, Jordan, Russia, Saudi Arabia, Serbia, UAE, Ukraine and USA
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Oct 12, 2011
OEM Agreement Enables Altera to Deliver Virtual Target Enabling Early Software Development Targeting SoC FPGAs
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Oct 12, 2011
Collaboration on Embedded Memory and Logic Library for UMC’s Enhanced Poly SiON HLP Process Enables Creation of High-Performance, Low-Power SoCs
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Oct 11, 2011
Synopsys continues investments in Armenia youth to provide them with world-class education for growing high-tech industry in Armenia
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Oct 9, 2011
Synopsys Armenia Educational Department Has Provided 373 Highly Skilled Engineers to Armenia’s Growing High-Tech Industry
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Oct 8, 2011
One Tree for Each Employee
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Oct 3, 2011
Selected by More Than 30 Customers, Silicon-Proven USB 3.0 IP Lowers Integration Risk
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Sep 29, 2011
Synopsys to Sell ARM Fast Models and Develop New Fast-Timed Models of ARM Cortex™ Processors
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Sep 29, 2011
TLMCentral Lists More Than 600 System-Level Models to Speed Creation of Virtual Prototypes
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Sep 28, 2011
CODE V Version 10.4 is now generally available
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Sep 27, 2011
Automated Error Detection/Recovery and Greater Resistance to Soft Errors Delivers More Reliable Operation in Harsh Environments
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Sep 26, 2011
STMicroelectronics Reports 2X Productivity Advantage Over Existing ECO Flow with Integration of IC Compiler and Galaxy Custom Designer
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Sep 20, 2011
Innovations in TetraMAX ATPG and Yield Explorer Increase Throughput and Ease Deployment
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Sep 20, 2011
Design Teams Worldwide Quickly Achieve Test and Repair Quality Goals for Embedded Memories
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Aug 31, 2011
Achronix Speedster22i FPGAs, built on Intel 22-nm technology, deliver GHz performance with Synopsys Synplify Pro synthesis software
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Aug 23, 2011
Annual Competition Recognizes Student Achievements in Optical Design
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Jul 26, 2011
LightTools version 7.2 is now generally available
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Jul 20, 2011
DSP Development Time Cut in Half While Meeting Performance Goals
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Jul 19, 2011
Virtualizer Accelerates Software Development Schedules by Up to Nine Months with Lower Engineering Effort
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Jul 18, 2011
Renesas Electronics Adopts HAPS-64 Systems and UMRBus in their EDA Teams for FPGA Prototyping Used by Multiple Design Groups
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Jul 11, 2011
Builds on Award-Winning IC Compiler Zroute and IC Validator In-Design Physical Verification Technologies
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Jul 11, 2011
Samsung Successfully Tapes Out First 20-nm Test Chip Using IC Compiler and In-Design Physical Verification with IC Validator
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Jul 11, 2011
Synopsys Custom Design Solution Now Supported by GLOBALFOUNDRIES 65nm Process Technologies
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Jun 27, 2011
DesignWare AEON Embedded Non-Volatile Memory IP Improves Electrical Performance and Lowers Integration Risk for Wireless and Analog SoC Designs
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Jun 13, 2011
Unified Solution Streamlines Development of Embedded Temperature Sensor IP for 65nm, 40nm and 28nm Geometries
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Jun 8, 2011
Shrenik, First Individual Recipient, Recognized for Guiding Collaborative Initiatives Resulting in Widely-used Standards in Electronic Design
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Jun 6, 2011
Agreements Aim to Maximize System-on-Chip (SoC) Performance and Energy Efficiency while Shortening Development Time
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Jun 2, 2011
ST Successfully Tapes Out First 20-nm Test Chip
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Jun 2, 2011
Synopsys Galaxy Custom Designer Provides New Capabilities to Address Advanced Process Node Design Challenges
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May 26, 2011
Flow provides optimized methodologies to shorten time-to-market and time-to-volume for designers using TSMC's 28-nanometer process technology
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May 23, 2011
Integrated Design and Measurement Technology Bridges LTE/LTE-Advanced Algorithm Design and System Integration
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May 12, 2011
Silicon-Proven DesignWare Controllers and PHY IP Lower Design Risk and Speed Adoption of SATA 6G Functionality and Data Transfer Rates
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May 11, 2011
DesignWare ARC Sound DRA Decoder Supports the Chinese National High-Definition Audio Standard and Enables an Enhanced, High-Quality Audio Experience
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May 5, 2011
Silicon-Proven DesignWare IP Lowers Design Risk and Allows Interoperability with USB 3.0-Enabled Products
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Apr 26, 2011
IC Compiler Widely Deployed In HiSilicon Production Design Flow
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Apr 19, 2011
Exar Engineers Detected and Fixed Routing Congestion Hot Spots in Synthesis Before Hand-off to Physical Implementation
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Apr 18, 2011
Advanced Regression and Analysis Environment Streamlines Mixed-signal Verification and Boosts Productivity
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Mar 31, 2011
High-Quality USB 2.0 IP Reduces Integration Risk and Helps Meet Critical Low Power and Area Requirements for Complex SoC Design
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Mar 30, 2011
Achieving USB Logo Certification for DesignWare USB 2.0 picoPHY Demonstrates Success of Collaboration
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Mar 28, 2011
Solution Accelerates Design Implementation through Early Exploration While Tolerating Incomplete Data
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Mar 23, 2011
High-Quality, Broad Portfolio and Worldwide Technical Support Helps Freescale Speed SoC Development Time and Lower Risk
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Mar 22, 2011
High-quality DesignWare IP Combined with Professional Services Speeds Development Time and Lowers Integration Risk for Wireless Gigabit Alliance SoC
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Mar 21, 2011
High-performance 10/12-bit ADCs and 14-bit DACs Enable Easy Integration into Broadband Wireless and Wireline Communication SoCs
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Mar 16, 2011
Advanced Device Simulation Capabilities Support Development of Novel SiC Devices
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Mar 15, 2011
CustomSim and VCS Solution Enables Fast Turnaround Time for SoC Verification
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Mar 15, 2011
Available from Synopsys as part of its acquisition of Optical Research Associates, CODE V Version 10.3 is now generally available
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Mar 8, 2011
Synplify and Synphony Product Families Deliver Capacity and Faster Runtime for Multi-Million Gate Designs
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Mar 7, 2011
Processor Designer Tool Automates High Performance Custom Processor Development
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Mar 2, 2011
Manual Documents Best Practices in Design-for-Prototyping
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Mar 1, 2011
HAPS-600 Series Offers High Flexibility and Scalability for Larger FPGA-Based Prototyping Projects with up to 81 Million ASIC Gates
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Mar 1, 2011
Provides Lowest Cost of Ownership and High Accuracy for 28nm and Below
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Feb 28, 2011
Additional New DMA Engine and 256-bit Datapath Address Enterprise Computing Performance Requirements
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Feb 22, 2011
Family of High-Performance, Low Power Data Converter IP Eases Integration Effort and Lowers Risk for Wireless Communications and Digital TV SoCs
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Feb 10, 2011
New TCAD Sentaurus Models Address Cryogenic Ion Implantation for Leakage Reduction of Leading-edge Logic and Memory Devices
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Feb 9, 2011
Enhanced Architecture Enables Faster Access to Off-chip DRAM and Delivers Higher Throughput for SoC Designs
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Feb 7, 2011
Platform Architect Enables Early Architecture Definition, Hardware-Software Partitioning and Performance Analysis of Multicore Systems Months before Software is Available
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Feb 3, 2011
VCS support for OVM 2.1.1 and the upcoming UVM 1.0 enables smooth migration to faster verification