News Releases

News Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for news releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.

Month Year

Su	Mo	Tu	We	Th	Fr	Sa
25	26	27	28	29	30	1
2	3	4	5	6	7	8
9	10	11	12	13	14	15
16	17	18	19	20	21	22
23	24	25	26	27	28	29
30	31	1	2	3	4	5

Cancel OK

Month Year

Su	Mo	Tu	We	Th	Fr	Sa
25	26	27	28	29	30	1
2	3	4	5	6	7	8
9	10	11	12	13	14	15
16	17	18	19	20	21	22
23	24	25	26	27	28	29
30	31	1	2	3	4	5

Cancel OK

Get News Alerts by Email

Year All Years 2021 2020 2019 2018 2017 2016 2015 2014 2013 2012 2011 2010 2009 2008 2007 2006 2005 2004 2003 Category All Categories Chip Design Corporate & Financial Optical Solutions Silicon Engineering Silicon IP Software Security & Quality Verification Uncategorized Keywords Go

Advanced Search

Search

  Search Headlines Only

Category

All Categories Chip Design Corporate & Financial Optical Solutions Silicon Engineering Silicon IP Software Security & Quality Verification Uncategorized

From

To

Asset Types

 Video  Audio  Photos  Documents  Events  Standard

 Basic Search

• May 31, 2005

  Huawei Adopts Synopsys VCS Native Testbench to Accelerate Verification of Networking and Communications ASICs

  VCS® Native Testbench Technology and Comprehensive Coverage Enable Huawei to Achieve First-Silicon Success in Less Time
• May 25, 2005

  Synopsys Chairman and Chief Executive Officer to Speak At The SG Cowen 33rd Annual Technology Conference
• May 25, 2005

  IBM, Chartered Select Synopsys' Hi-Speed USB 2.0 and OTG PHYs for Their 90-nm Process Platform

  Synopsys DesignWare® PHY IP Enables Reliable USB Connectivity for IBM and Chartered Foundry Customers
• May 25, 2005

  Synopsys Provides Low-Power Reference Flow for IBM-Chartered 90-Nanometer Process Platform

  Complete RTL to Production-Ready GDSII Flow Speeds 90-nm Designs
• May 24, 2005

  Synopsys i-Virtual Stepper System for Photomask Qualification Implemented by UMC

  i-Virtual Stepper System Integrates Lithography Simulation and Automation to Deliver Improved Mask Turn-Around Time and Yield
• May 23, 2005

  Synopsys Unveils Latest Innovation in RTL Synthesis, Eliminating Wireload Models

  Design Compiler® 2005 Delivers Accurate Correlation to Post-Layout Timing for RTL Designers
• May 18, 2005

  Synopsys Announces CFO Transition
• May 18, 2005

  Synopsys Posts Financial Results for Second Quarter of Fiscal 2005
• May 12, 2005

  Synopsys' Hi-Speed USB OTG IP is First and Only Complete IP Solution to Earn Hi-Speed USB OTG Certification

  Certified Digital and PHY IP Gives Designers the Flexibility to Choose From 130nm or 90nm Processes
• May 11, 2005

  Synopsys Closes Nassda Acquisition

  Litigation Successfully Concluded
• May 10, 2005

  Synopsys Delivers Industry's First Single-Vendor PCI Express IP Solution to Pass PCI-SIG Compliance

  Leading Digital Core Combined With High-performance PHY Lowers Risk for SoC Designers
• May 10, 2005

  Faraday Verifies Complex CPU Cores With Synopsys' VCS and Vera Verification Solutions

  Advanced Coverage and Testbench Technologies in the Synopsys Discovery™ Verification Platform Enable Robust Validation of Faraday's Processor IP
• May 9, 2005

  Synopsys Introduces PrimeRail for Power Network Sign-Off

  Extending Sign-off in the Galaxy™ Design Platform to Voltage-Drop and EM Analysis
• May 5, 2005

  Synopsys Owns Inventions in Magma Litigation

  Company Releases van Ginneken Deposition
• May 4, 2005

  Synopsys Announces Earnings Release Date and Conference Call Information for the Second Quarter of Fiscal Year 2005
• Apr 26, 2005

  Synopsys DesignWare IP Enables Full-Service SoC Design Foundry for Global UniChip

  Full Portfolio of Synopsys' IP Expands GUC's Deep Submicron Offering
• Apr 20, 2005

  Top Layer Networks Uses Synopsys' Testbench Automation Solution to Verify Network Security Chip

  Vera Tool Offers the Thorough Verification Necessary for Mission-Critical Network Protection
• Apr 20, 2005

  CreVinn Adopts Synopsys' VCS Native Testbench to Accelerate ASIC Development

  VCS Native Testbench Helps CreVinn Speed Testbench Development and Performance to Deliver a Higher Level of Verification
• Apr 4, 2005

  Atmel Adopts Synopsys' VCS Native Testbench and SystemVerilog Assertions

  VCS Native Testbench Technology Helps Atmel Find Critical Bugs in Less Time
• Mar 30, 2005

  Synopsys, Inc. Announces 15th EDA Interoperability Developers' Forum Featuring Wide Array of Industry Topics and Initiatives
• Mar 30, 2005

  Synopsys Expands University Program by Donating Technology Licenses to Southern Methodist University

  SMU to Use Synopsys Tools for Industrial Research in Embedded System Design
• Mar 15, 2005

  Synopsys to Hold Investor Conference on Tuesday, March 22, 2005
• Mar 14, 2005

  Synopsys Unveils Galaxy IC Compiler - Next-Generation Physical Design Solution

  Leading-edge Customers Attest to Achieving Increased Performance and Productivity
• Mar 8, 2005

  Synopsys' coreAssembler Reduces Time and IP Integration Risk for Spirit-Compliant IP

  Benefits Include Support for SPIRIT 1.0 Standard and Integration With Galaxy™ and Discovery™ Platforms
• Mar 7, 2005

  Synopsys Introduces Next Generation 1-Pass Test Synthesis Enabling Deep Submicron Test For Mainstream Designs

  DFT Compiler Max Delivers 10-50x Test Time Reduction in the Smallest Area With the Ease of 1-Pass Scan Synthesis

Show 5102550100 per page