Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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May 12, 2005
Certified Digital and PHY IP Gives Designers the Flexibility to Choose From 130nm or 90nm Processes
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May 11, 2005
Litigation Successfully Concluded
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May 10, 2005
Leading Digital Core Combined With High-performance PHY Lowers Risk for SoC Designers
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May 10, 2005
Advanced Coverage and Testbench Technologies in the Synopsys Discovery™ Verification Platform Enable Robust Validation of Faraday's Processor IP
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May 9, 2005
Extending Sign-off in the Galaxy™ Design Platform to Voltage-Drop and EM Analysis
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May 5, 2005
Company Releases van Ginneken Deposition
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Apr 26, 2005
Full Portfolio of Synopsys' IP Expands GUC's Deep Submicron Offering
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Apr 20, 2005
Vera Tool Offers the Thorough Verification Necessary for Mission-Critical Network Protection
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Apr 20, 2005
VCS Native Testbench Helps CreVinn Speed Testbench Development and Performance to Deliver a Higher Level of Verification
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Apr 4, 2005
VCS Native Testbench Technology Helps Atmel Find Critical Bugs in Less Time
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Mar 30, 2005
SMU to Use Synopsys Tools for Industrial Research in Embedded System Design
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Mar 14, 2005
Leading-edge Customers Attest to Achieving Increased Performance and Productivity
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Mar 8, 2005
Benefits Include Support for SPIRIT 1.0 Standard and Integration With Galaxy™ and Discovery™ Platforms
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Mar 7, 2005
DFT Compiler Max Delivers 10-50x Test Time Reduction in the Smallest Area With the Ease of 1-Pass Scan Synthesis
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Mar 1, 2005
Synopsys' Distributed Processing and Scalable Architecture Improve Time to Yield While Maintaining Accuracy
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Feb 28, 2005
ESP Boosts Verification Productivity by 2X for Memory Compilers
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