News Releases
News Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for news releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Jul 18, 2019Synopsys ZeBu Virtual Tester Solution with Ixia IxVerify Enables Scalable, Flexible, and Accurate Validation of Complex Networking SoCs
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Jul 15, 2019Synopsys to Present Industry's First Fully Automated Technology for AMS Emulation at DARPA ERI Summit 2019
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Jul 11, 2019Realtek Deploys IC Compiler II for Its Next-generation Communications Network Design
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Jul 11, 2019IC Validator Delivers Superior Performance for DRC and LVS Signoff
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Jul 2, 2019Comprehensive Yield Learning Platform from Synopsys Enables Close Collaboration with Samsung and Its Fabless Customers During Production Ramp-up of New Products
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Jun 26, 2019Company Delivers on Its Commitment to Combat Climate Change
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Jun 24, 2019Collaboration for Third Generation Builds on Successful Deployment of VDKs for AURIX TC2x and TC3x Series to Enable Early Software Development at Tier1 and OEM Customers
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Jun 12, 2019Continuous Commitment to Development of High-quality DesignWare IP Lowers Risk and Accelerates Time-to-Market for SoC Designs
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Jun 5, 2019New Kit Provides Infrastructure for Checking, Reporting, and Packaging of ASIC Designs
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Jun 4, 2019AI-enhanced, Cloud-ready Platform with Fusion Technology Accelerates Next Wave of Industry Innovation
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Jun 4, 2019High-quality DesignWare Interface and Analog IP Optimized for High Performance and Low Power in AI, Cloud Computing, and Mobile SoCs
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May 30, 2019New Native Tool Integrations Enable up to 5X Higher Verification Performance
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May 30, 2019Industry's First Full-chip Implementation and Verification Completed Entirely on Amazon Web Services Cloud
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May 28, 2019Juniper Networks Achieves 14% Lower Power and 6% Smaller Area on Next-generation Networking Design
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May 28, 2019Breakthrough Technology Redefines Design Signoff by Leveraging Industry's Golden Timing Signoff and Machine Learning Technology to Accelerate Statistical Yield Analysis
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May 27, 2019Synopsys Design and Verification Platforms and DesignWare Interface IP Enable Optimized PPA and Faster Time-to-Market for Smartphones, Laptops, and Other Mobile Devices
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May 23, 2019Expanded Cloud-based Services Give SoC Designers More Scalability and Flexibility
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May 23, 2019VC Formal Datapath Validation Application Enables Broad Market Adoption of HECTOR Technology
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May 23, 2019New ZeBu Power Analyzer Enables Emulation-based Power Analysis for Billion-cycle Software Workloads Not Feasible with Traditional Methods
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May 22, 2019Q2 2019 Financial Highlights
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May 21, 2019ASIL D Ready Vision Processor with Safety Enhancement Delivers Highest Level of Functional Safety for Automotive SoCs
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