Press Releases
Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
Nov 1, 2017Successful Testing of DesignWare Cryptography Software Library Enables Development of Highly Secure IoT Systems-
Oct 31, 2017Enhanced BIST and Repair Algorithms for 7-nm FinFET Processes Increase Memory IP Test Coverage and Accelerate Power-On Initialization
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Oct 31, 2017Company Standardizes on TetraMAX II Solution to Create Manufacturing Tests for All Designs
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Oct 31, 2017Report highlights progress over past decade, identifying key indicators of project maturity and underscoring the importance of measuring risk
Oct 30, 2017ASIL D Ready Certified DesignWare Embedded Test and Repair IP Speeds Functional Safety Qualification for Automotive ADAS Applications-
Oct 30, 2017Provides Highest Degree of Safety Related Confidence and Accelerates Functional Safety Qualification
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Oct 26, 2017Recognition for Leadership in the Optics Industry and The Optical Society
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Oct 25, 2017Program's Goal is to Advance Superconductor Design and Propel Electronics Beyond CMOS
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Oct 23, 2017Comprehensive Synopsys Platform Enables Accelerated Verification of High-Performance, Low-Power RISC-V Processors and SoCs
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Oct 18, 2017New Virtualizer Design Kits Enable Automotive Tier 1 and OEM Companies to Start Software Development, Integration and Test Before Silicon
Oct 17, 2017Acquisition Adds One-Time Programmable Non-Volatile Memory IP to DesignWare NVM IP Offering-
Oct 9, 2017Release 2017.09 of the RSoft Product Family Now Available
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Oct 5, 2017Native SystemVerilog USB VIP Features Built-in Coverage, Verification Plan, Protocol-Aware Debug and Source Code Test Suites
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Sep 24, 2017Reference Flow for Silicon-Proven Design Platform Accelerates Path to Lower Power and Design Cost
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Sep 20, 2017DesignWare Interface and Analog IP Enables Faster Time-to-Volume for Energy-Efficient IoT and Mobile SoCs
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Sep 20, 2017Certification Enables Optimized Implementation and Predictable Signoff
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Sep 20, 2017Latest Iteration of the Building Security in Maturity Model Shows More Organizations Jumpstarting their Software Security Initiatives with Assessments and Improving Over Time
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Sep 19, 2017DesignWare ARC Secure IP Subsystem Provides Programmable Hardware Root of Trust to Protect Against Malware, Tampering and Exploitation of Communication Protocols in SoCs
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Sep 19, 2017Comprehensive Foundry Reference Flow Leverages Industry-leading IC Compiler II
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Sep 18, 2017Materials Modeling Enables Semiconductor Manufacturers to Save Time and Cost for Advanced Process Node Development
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Sep 18, 2017Platform Consisting of ARC Data Fusion IP Subsystem, Peripherals, Operating System and Software Development Tools Enables Immediate Productivity
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Sep 18, 2017IoT Platform Accelerates Designs for IoT Edge Devices with Synopsys Silicon-Proven ARC Data Fusion IP Subsystem, Brite ASIC Design Services and SMIC 55-nm Ultra-Low Power Process
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Sep 18, 2017TSMC Awards recognize Synopsys' Collaboration on Interface IP, Joint Development of 7nm FinFET Plus and 12FFC Design Infrastructures and Joint Delivery of an Automotive Design Enablement Platform
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Sep 13, 2017Combination of Alango's Far-Field Voice Enhancement Software Technologies and Synopsys' ARC IP Subsystem Provides Ideal Low-Power Solution for Voice-Controlled Devices
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Sep 12, 2017Logic Libraries and Embedded Memories for TSMC 40LP and 40ULP eFlash Processes Improve Energy Efficiency for IoT Devices
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Sep 11, 2017DesignWare Foundation and Interface IP on TSMC 7-nm Process Technology Enables Faster Time-to-Market for Mobile, Automotive and High-Performance Computing SoCs
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Sep 11, 2017Platform-Wide Certification for TSMC's Latest Advanced-Process Technology
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Sep 11, 2017Platform-Wide Enhancements Across Digital and Custom Design Tools Deliver a Production-Ready Flow
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Sep 8, 2017Updating GAAP targets; No Change to Non-GAAP targets
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Sep 6, 2017ARC Processor Summit Attendees Will Learn about Solutions to Address Design Challenges in IoT Security, Automotive Safety and Embedded Vision Applications
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Sep 5, 2017Latest Release Offers Enhanced MTF Optimization and Visualization of Compact Optical Devices
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Sep 5, 2017Samsung SARC Selects Synopsys as Primary Verification Solution for Advanced Mobile Processor DesignsComprehensive Synopsys Platform Enables Accelerated Verification of High-Performance, Low-Power CPU, GPU and System IP for Mobile SoCs
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Aug 29, 2017New Bluetooth Low Energy PHY Delivers Up to 60 percent Smaller Area for Low-Power IoT Designs
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Aug 24, 2017In addition, 41 Percent Believe Lack of Skilled Security Personnel or Training is Key Secondary Challenge
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Aug 16, 2017Q3 2017 Financial Highlights
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Aug 9, 2017Analysis of 4.8 Billion Fuzz Tests Identified 6.6 Seconds as the Average Time to First Failure for the Least Mature Protocol
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Aug 8, 2017CNN-based Image Classification Software with DesignWare EV6x Vision Processor IP Delivers High Recognition Rate with Small Memory Footprint for Power-Constrained Devices
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Aug 8, 201718th Annual Competition Recognizes Student Achievements in Optical Design
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Aug 1, 2017DesignWare PHY IP for LPDDR4, MIPI, PCI Express and Ethernet Delivers High Reliability for ADAS and Autonomous Vehicle SoCs
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Jul 26, 2017HAPS-80 Delivers 2X Performance and 2X Capacity Compared to Prior Generation
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Jul 25, 2017New DesignWare HBM2 Controller, PHY and Verification IP Enables High-Bandwidth, Power-Efficient Systems
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Jul 13, 2017Latest Product Updates Expand Coverage for New Programming Languages and MISRA Compliance, Improve Integration Capabilities and Increase Flexibility
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Jun 29, 2017Industry Experts Explore DevOps Security, IoT Security across Verticals and How to Build Security into the Software Development Lifecycle
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Jun 28, 2017VC Formal Delivers Faster Convergence for Complex Multi-Functional Product Designs
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Jun 26, 2017Enhanced DesignWare EV6x Family Delivers Up to 4.5 TeraMACs/sec for Real-Time Vision Processing
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Jun 20, 2017Enablement Includes Industry-Leading IC Compiler II P&R Solution and DesignWare Embedded Memory IP
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Jun 19, 2017Exclusive Product Integration To Combine Power And Reliability Signoff Solution With Physical Implementation Solution For In-Design Analysis To Spur Future Smart Product Development
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Jun 15, 2017Next-generation Formal Verification Technology Uniquely Positioned for Performance and Capacity Required for Complex SoCs
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Jun 14, 2017World's Leading Solution Provider of Video Surveillance[1] Deploys Synopsys Solutions to Build Security and Quality into Its Software Development Lifecycle and Supply Chain
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Jun 8, 2017Online Access to Comprehensive Suite of Free and Open Source Software and Tools Provides One-Stop Shop for Software Developers Programming ARC Processor-based Devices
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Jun 6, 2017New DesignWare CCIX Controller, PHY and Verification IP Supports Speeds Up to 25Gbps and Enables Faster Data Access
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Jun 6, 2017Analysis of More Than 120,000 Applications Found that Half of Third-Party Software Components in Use Are Outdated
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Jun 5, 2017Solution enables secure, remote lifecycle management for automotive, IoT and mobile applications
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Jun 5, 2017Demonstration Proves Successful System Bring-Up and 16 GT/s Data Transfer of the DesignWare IP for PCI Express 4.0 Specification Targeting High-Performance Cloud Computing Designs
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May 31, 2017Complete Compliant MIPI Display Solution Reduces Data Transmission Bandwidth for Mobile, Virtual Reality and Automotive SoCs
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May 30, 2017ZeBu Server Enables Hardware and Software Teams to Work in Parallel, Saving Months on Schedules
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May 28, 2017New Optimized QuickStart Implementation Kits To Help Designers Quickly Achieve Target QoR Using Synopsys Design Platform
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May 25, 2017Survey of Medical Device Manufacturers and Healthcare Delivery Organizations Reveals Industry's Lack of Confidence and Alignment in Securing Medical Devices
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May 24, 2017Synopsys Design Platform is Ready for Early Engagement with Mutual Customers
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May 24, 2017Silicon-Proven IP Portfolio Provides Low-Risk Path to Silicon Success for SoC Designs on Samsung's Advanced Process Technologies
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May 24, 2017IC Validator delivers physical signoff in hours with massively parallel architecture
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May 24, 2017Synopsys Custom Design Platform Certified for IoT, Mobile Computing and Automotive Applications
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May 23, 2017DesignWare ARC HS4x Family Delivers Twice the Signal Processing Performance of Previous ARC HS Cores with Integrated DSP Capability
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May 22, 2017DesignWare PHY IP Cuts Power and Area by More Than 35 Percent for High-Performance Computing Applications Including Machine Learning and Artificial Intelligence
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May 18, 2017Solution Supports USB, USB PD and DisplayPort on Type-C and is Expandable to Future Protocols
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May 11, 2017Massively Parallel Architecture Accelerates Physical Signoff and Delivers Industry-Leading Turnaround Time
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May 10, 2017Delivers Accuracy Within 5% of Power Signoff
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May 4, 2017Delivers Higher Performance and Comprehensive Variation Analysis for Robust AMS Design
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May 4, 2017Seamless Integration of Synopsys’ Synplify Pro and Identify RTL Debugger With Microsemi’s Libero SoC Design Suite for FPGA Customers
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May 3, 2017InfoSec Global and Synopsys Collaborate to Deliver Complete Hardware/Software Root of Trust SolutionCombination of InfoSec Global Agile Cryptography with Synopsys tRoot Hardware Secure Module Increases Security for Industrial IoT Designs
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May 2, 2017Combination of jNet ThingX JavaCard OS with Synopsys' Anti-Tamper ARC SEM Cores Eases Development of Common Criteria Certified SoCs
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Apr 27, 2017New Version of LucidDrive Supports Analysis of Headlight Road Performance in Dynamic Traffic Situations
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Apr 27, 2017DesignWare True Random Number Generators, Logic Libraries, Embedded Memories and STAR Memory System Provide Low-Risk Path to First-Pass Silicon Success
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Apr 26, 2017Seamless Integration of Industry's Fastest Emulation System into Dataflow Processing Unit Development Effort
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Apr 25, 2017ASIL B and D Ready DesignWare IP Accelerates Functional Safety Assessments for Automotive SoCs
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Apr 20, 2017DesignWare IP Subsystem Integrates New Audio/Voice/Speech and I3C Hardware and Software to Address Expanding Processing Requirements of Secure, Multi-Sensor SoCs
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Apr 12, 2017Native SystemVerilog VIP Includes Built-In Coverage, Verification Planning, and Protocol-Aware Debug
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Mar 28, 2017Industry leaders in CPU, GPU and fabless SoC markets adopt IC Validator's massively parallel distributed processing for overnight signoff
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Mar 27, 2017Updated Interface with Synopsys Sentaurus TCAD Products and New High-Speed Optical Absorption Calculation Now Available
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Mar 21, 2017Synopsys Announces Availability of Comprehensive Low Power Reference Kit for Design and VerificationBitcoin-mining Design-based Kit Features Complete RTL-to-GDSII Low Power Methodology
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