Press Releases
Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
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Mar 8, 2017New Task Graph Generation Technology in Synopsys Platform Architect Automates Capture of Key Performance Requirements Needed to Explore Next Generation SoC Architectures
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Mar 7, 2017New ARC EM Safety Islands Simplify Development and Accelerate ISO 26262 Certification of Advanced Driver Assistance Systems, Radar and Sensor Applications
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Mar 6, 2017Latest Release Helps Optical Designers Build Project Specifications and Manage Design and Performance Goals
- Mar 2, 2017Company Makes Significant Move to the Leaders Quadrant and Is Recognized for Completeness of Vision and Ability to Execute
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Feb 28, 2017Delivers Industry's Fastest Emulation Performance and Scalability
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Feb 27, 2017Liberty Technology Advisory Board Approves New Liberty Variation Format Additions
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Feb 21, 2017Graphcore Adopts IC Compiler II for Implementing their Machine-Learning Processor Chip
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Feb 2, 2017ARC EM Processors' Leading Performance Efficiency Delivers Area and Power Savings for IoT and Mobile Applications
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Jan 30, 2017Cheetah Fine-Grained Parallelism Technology Natively Available in VCS 2017.03; Delivers Breakthrough Performance on Existing x86 CPU Server Configurations
Jan 26, 2017DesignWare ARC HS38 Dual-Core Processor, DDR4 and PCI Express 3.1 IP Enable Higher Performance and Lower Power for Starblaze's MB1000 Enterprise SSD Controller-
Jan 16, 2017TetraMAX II ATPG Speeds Test Generation by 10x and Reduces Patterns by 50 Percent
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Jan 10, 2017Acquisition Adds Coverage for Fortran Programming Language to Coverity Static Analysis Solution
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Jan 5, 2017SoReal! Virtual Platform Accelerates Software Development 12 Months before Hardware Availability
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Dec 8, 2016Native SystemVerilog DisplayPort VIP Includes Built-In Coverage, Verification Planning and Protocol-Aware Debug
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Dec 7, 2016New Automation Technology Brings 5x - 10x Reduction in Compute Costs and Runtime
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Dec 7, 2016Latest Release Speeds Simulation of Long-Haul Optical Transmission Systems and Photonic Integrated Circuits
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Dec 5, 2016Model Developed Through Collaboration Between Synopsys and IIT Bombay to Simulate Negative-Bias Temperature Instability in FinFET and Nanowire FET at 7nm, 5nm and Below
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Nov 30, 2016Q4 2016 Financial Highlights
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Nov 15, 2016STAR Memory System's Multi-Memory Bus Processor Cuts Test Logic Area While Maintaining High CPU Performance
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Nov 14, 2016New Capabilities Accelerate Time to Automotive Test Goals and ISO 26262 Certification
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Nov 14, 2016Increases Test Quality by Targeting Subtle Defects in FinFETs and Emerging Processes
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Oct 26, 2016StarRC Technology Files Available in 28-nm PDK for Digital and Custom Designs
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Oct 24, 2016Platform Certified for Samsung's Second Generation of 10nm Process (10LPP)
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Oct 24, 2016Samsung and Synopsys Collaborate to Reduce FinFET Layout Time
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Oct 18, 2016No Impact on ZeBu Sales or Support
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Oct 12, 2016Enables Fast, Accurate Optical Simulation and Analysis of Automotive Lighting Products with Minimal Learning Curve for CATIA V5 Users
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Oct 6, 2016Streamlines Design and Analysis Capabilities for Photonic Devices in Semiconductor, Silicon Photonics and LED/OLED Applications
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Sep 22, 2016Scope of Collaboration Includes Innovations in Place-and-Route Optimization Technologies for High-Performance Designs
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Sep 21, 2016DesignWare Logic Libraries and Embedded Memories Accelerate Development and Qualification of Automotive SoCs
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Sep 21, 2016TSMC Certified Synopsys Custom, Digital and Signoff Tools for 16FFC Process
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Sep 20, 2016Compact Link Layer and PHY Supporting Bluetooth 5 Enable Efficient Wireless Connectivity with Secure Connections and Extended Reach
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