Press Releases

Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.

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• May 18, 2005

  Synopsys Announces CFO Transition
• May 18, 2005

  Synopsys Posts Financial Results for Second Quarter of Fiscal 2005
• May 12, 2005

  Synopsys' Hi-Speed USB OTG IP is First and Only Complete IP Solution to Earn Hi-Speed USB OTG Certification

  Certified Digital and PHY IP Gives Designers the Flexibility to Choose From 130nm or 90nm Processes
• May 11, 2005

  Synopsys Closes Nassda Acquisition

  Litigation Successfully Concluded
• May 10, 2005

  Synopsys Delivers Industry's First Single-Vendor PCI Express IP Solution to Pass PCI-SIG Compliance

  Leading Digital Core Combined With High-performance PHY Lowers Risk for SoC Designers
• May 10, 2005

  Faraday Verifies Complex CPU Cores With Synopsys' VCS and Vera Verification Solutions

  Advanced Coverage and Testbench Technologies in the Synopsys Discovery™ Verification Platform Enable Robust Validation of Faraday's Processor IP
• May 9, 2005

  Synopsys Introduces PrimeRail for Power Network Sign-Off

  Extending Sign-off in the Galaxy™ Design Platform to Voltage-Drop and EM Analysis
• May 5, 2005

  Synopsys Owns Inventions in Magma Litigation

  Company Releases van Ginneken Deposition
• May 4, 2005

  Synopsys Announces Earnings Release Date and Conference Call Information for the Second Quarter of Fiscal Year 2005
• Apr 26, 2005

  Synopsys DesignWare IP Enables Full-Service SoC Design Foundry for Global UniChip

  Full Portfolio of Synopsys' IP Expands GUC's Deep Submicron Offering
• Apr 20, 2005

  Top Layer Networks Uses Synopsys' Testbench Automation Solution to Verify Network Security Chip

  Vera Tool Offers the Thorough Verification Necessary for Mission-Critical Network Protection
• Apr 20, 2005

  CreVinn Adopts Synopsys' VCS Native Testbench to Accelerate ASIC Development

  VCS Native Testbench Helps CreVinn Speed Testbench Development and Performance to Deliver a Higher Level of Verification
• Apr 4, 2005

  Atmel Adopts Synopsys' VCS Native Testbench and SystemVerilog Assertions

  VCS Native Testbench Technology Helps Atmel Find Critical Bugs in Less Time
• Mar 30, 2005

  Synopsys, Inc. Announces 15th EDA Interoperability Developers' Forum Featuring Wide Array of Industry Topics and Initiatives
• Mar 30, 2005

  Synopsys Expands University Program by Donating Technology Licenses to Southern Methodist University

  SMU to Use Synopsys Tools for Industrial Research in Embedded System Design
• Mar 15, 2005

  Synopsys to Hold Investor Conference on Tuesday, March 22, 2005
• Mar 14, 2005

  Synopsys Unveils Galaxy IC Compiler - Next-Generation Physical Design Solution

  Leading-edge Customers Attest to Achieving Increased Performance and Productivity
• Mar 8, 2005

  Synopsys' coreAssembler Reduces Time and IP Integration Risk for Spirit-Compliant IP

  Benefits Include Support for SPIRIT 1.0 Standard and Integration With Galaxy™ and Discovery™ Platforms
• Mar 7, 2005

  Synopsys Introduces Next Generation 1-Pass Test Synthesis Enabling Deep Submicron Test For Mainstream Designs

  DFT Compiler Max Delivers 10-50x Test Time Reduction in the Smallest Area With the Ease of 1-Pass Scan Synthesis
• Mar 3, 2005

  Synopsys, Inc. Announces Technical Seminar Series Featuring Verification, Implementation, and Design-For-Manufacturing Solutions
• Mar 1, 2005

  Grace Semiconductor Manufacturing Standardizes on Synopsys' DFM Tool Suite to Reduce GDSII-to-Mask Turnaround Time

  Synopsys' Distributed Processing and Scalable Architecture Improve Time to Yield While Maintaining Accuracy
• Mar 1, 2005

  Synopsys Chief Financial Officer to Speak at the Morgan Stanley Semiconductor & Systems Conference on March 9, 2005
• Feb 28, 2005

  Synopsys and Hitachi Demonstrate 3Gb/s SATA II Interoperability Between DesignWare SATA Host IP Core and Deskstar Hard Drive
• Feb 28, 2005

  Virage Logic Standardizes on Synopsys' ESP for Memory Verification

  ESP Boosts Verification Productivity by 2X for Memory Compilers
• Feb 28, 2005

  Synopsys Chief Financial Officer to Speak at the Deutsche Bank Securities Global Software Conference on March 8, 2005
• Feb 28, 2005

  ARM and Synopsys Announce Industry-First and Recommended Flow for ARM11 Family With Intelligent Energy Manager Technology

  Galaxy™ Reference Flow Enables Faster Integration of ARM IEM Technology-Enabled IP for Low Power
• Feb 23, 2005

  Synopsys Announces the Appointment of Bill Frerichs as Vice President of Market Research and Strategy
• Feb 23, 2005

  Oki Standardizes on Synopsys' HSPICE High Voltage MOS Model

  Reduces Development Time of LCD TV Driver SoC by Half
• Feb 23, 2005

  Synopsys Chief Financial Officer to Speak at D. A. Davidson & Co. Silicon Technology Conference on March 3, 2005
• Feb 16, 2005

  Synopsys Posts Financial Results for First Quarter of Fiscal 2005
• Feb 14, 2005

  Synopsys Introduces Migration Service From Verisity Specman Elite® to Synopsys VCS® Verification Solution

  VCS Native Testbench Migration Service Provides Access to Up to 5X Faster Verification Performance
• Feb 14, 2005

  NetSilicon Cuts Verification Time and Effort in Half With Synopsys' Vera Tool

  Powerful Testbench Automation in Synopsys Discovery™ Verification Platform Enables NetSilicon to Achieve First-Silicon Success
• Feb 14, 2005

  Aarohi Deploys Synopsys' VCS Native Testbench to Verify Next-Generation Storage Chip

  Latest Release of VCS® Solution Extends Verification Performance and Effectiveness With New, Powerful Native Testbench Capabilities
• Feb 14, 2005

  Mentor Graphics and Synopsys Offer SystemVerilog Seminars for Users of the Verisity e Language

  Industry Leaders to Demonstrate Immediate Benefits of Using SystemVerilog for Advanced Verification
• Feb 9, 2005

  Synopsys' Magellan Tool Wins IEC DesignVision Award

  Advanced Hybrid Formal Verification Technology Awarded Top Honor in Design Verification Category
• Feb 7, 2005

  Synopsys Reduces Area and Power With Lowest Gate Count, Modular Hi-Speed USB On-The-Go Core

  Builds on Market Leading DesignWare Hi-Speed USB IP Solutions
• Feb 7, 2005

  Synopsys Announces Earnings Release Date and Conference Call Information for the First Quarter of Fiscal Year 2005
• Feb 2, 2005

  Synopsys Announces Support for SUSE LINUX With Galaxy Design and Discovery Verification Platforms

  Customers Gain Access to EDA Industry's Most Extensive Linux Support
• Feb 1, 2005

  Chipidea Licenses Synopsys' Galaxy Design and Discovery Verification Platforms
• Jan 31, 2005

  Synopsys and Altera Collaborate to Deliver ASIC-Strength Flow Supporting Altera's Stratix II FPGAs and HardCopy II Structured ASICs

  Synopsys' ASIC Compatible Design Flow Including DC FPGA and Formality Products and Professional Services Now Supports Altera's Stratix II and HardCopy II Families
• Jan 26, 2005

  New SystemVerilog Book Helps Engineers Master Assertion-Based Verification

  VhdlCohen Publishes SystemVerilog Assertions Handbook
• Jan 24, 2005

  Toshiba Achieves 40 Percent Power Reduction in Latest MeP SoC With Synopsys Galaxy Design Platform

  Galaxy Platform's Multi-Voltage Flow Enables Toshiba to Realize Power-Efficient Design
• Jan 18, 2005

  Grace and Synopsys Jointly Develop Reference Design Flow

  Major Commercial Foundry in China Endorses Synopsys Design Platforms
• Jan 11, 2005

  CEVA, Inc. Leverages Synopsys Galaxy and Discovery Platforms for Tape Out of Advanced Mixed-signal, DSP and High Speed Serial Interface Chips

  Synopsys' Complete RTL to Silicon Flow Was Key to Designing Complex Mixed-Signal ASICs
• Jan 10, 2005

  Synopsys to Respond to Request for Additional Information in Connection With Proposed Nassda Acquisition
• Jan 10, 2005

  Synopsys Corrects Full-Year Fiscal 2005 GAAP Earnings Target and Confirms and Updates First Quarter of Fiscal 2005 Financial Targets
• Jan 5, 2005

  Synopsys Chief Financial Officer to Speak at the Seventh Annual Needham Growth Conference on January 12, 2005
• Dec 21, 2004

  Agere Systems Recognizes Synopsys as Best-in-Class Supplier

  Strategic Supplier Award Cites Synopsys' Outstanding Solutions, Service and Support
• Dec 21, 2004

  Synopsys' ESP Full-Custom Memory Verification Enables Artisan to Achieve 5X Faster Time to Results

  Unique Symbolic Simulation Speeds Verification for Artisan's New Low-Power, High-Density Metro Platform Memories
• Dec 20, 2004

  UMC Enhances 90-nm Manufacturability Using Synopsys' Phase Shift Technology

  First Foundry to Offer Yield-Enhancing AA-PSM Technology in Volume Production Environment

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