Press Releases are listed below in chronological order with the most recent one appearing first. Please use the tool below to search for press releases in a particular year, category or that contain a keyword. For additional search options, please use the Advanced Search tool.
-
-
-
Nov 21, 2006
Builds Electronic Design Automation Industry's First Supercomputer to Claim 242nd Spot on Top500 List
-
Nov 21, 2006
Simple Implementation and Predictable Results Were Key Drivers in Selection
-
Nov 20, 2006
Combination of Design and Verification Platforms With DesignWare® IP Meets Tight Area, Power and Performance Goals
-
Nov 20, 2006
Freescale Deploys VCS Native Testbench for SystemVerilog-Based Verification
-
-
-
Nov 7, 2006
IC Compiler Enables 10 Percent Die-Size Shrink and 2X Faster Turnaround Time
-
Oct 31, 2006
San Jose Mercury News High-Tech Journalist to Present Keynote
-
Oct 30, 2006
Complete Solution Will Include Memory Controller and Mixed-Signal PHY to Reduce Risk and Speed System Integration
-
Oct 25, 2006
Bridge Connects a Wealth of PCI Express Technology-Based Systems and Peripherals to AMBA 2.0 AHB Protocol-Based Designs
-
Oct 24, 2006
Link Will Help Accelerate Yield Ramp of High-Volume Production ICs
-
Oct 23, 2006
Comprehensive Test Flow Links Galaxy Platform With STAR Memory System
-
Oct 19, 2006
Tight Correlation Between Synthesis and Layout Reduces Time-to-Market
-
Oct 17, 2006
Significant Improvement in the Quality of At-Speed Testing Expected from Test Pattern Generation Based on Precise Timing
-
Oct 17, 2006
Expanded Collaboration Will Extend Saber Product Line Integration with UGS' NX MCAD and Teamcenter PLM Technology
-
Oct 16, 2006
Innovative Process-Aware DFM Product Family Enables Designers to Reduce Process Variability Impact and Improve Design for Advanced Semiconductor Manufacturing
-
Oct 11, 2006
Automated Power Network Prototyping Delivers Optimized Area and Layer Trade-offs
-
Oct 9, 2006
University to Receive World-Class Laboratory to Advance Education in Microelectronics Design
-
Oct 9, 2006
Synopsys JupiterXT and IC Compiler Tools Enable Die Size Optimization
-
Oct 4, 2006
Next-Generation Signal Integrity Sign-off Models to Deliver Improved Accuracy and Reduced Turnaround Time
-
Oct 3, 2006
SystemVerilog and the VMM Methodology Provide a Robust, Scalable Verification Environment
-
Oct 2, 2006
Predictable Performance and Excellent Support Essential for Development of High-Performance Microdisplays
-
-
Sep 28, 2006
More Than 400 Engineers Gather at Eighth Annual Regional User's Conference
-
Sep 27, 2006
Second Consecutive Runtime Improvement for TetraMAX Tool Offers Designers Substantial Productivity Benefits
-
Sep 25, 2006
High-Performance Sitka Evaluation and Development Platform Allows Designers to Test and Debug Applications Using the DesignWare PCI Express IP in Hardware
-
-
-
Sep 20, 2006
Solutions Target Improved Lithography Modeling Accuracy, Reduced Time-to-Silicon, and Improved Manufacturing Yield
-
Sep 19, 2006
Technology Proven to Help Customers Achieve Ultra Low Power IC Designs
-
Sep 19, 2006
PSM Technology Enhances Lithography Resolution and Yield for High-Performance Products
-
Sep 15, 2006
Synopsys Dedicates Scan Chain Inventions to Public Domain
-
Sep 13, 2006
Provides 100 Percent of the OCP-IP Defined Functional Coverage Groups
-
-
-
Sep 5, 2006
High-Performance DesignWare IP for USB, PCIe, SATA and XAUI Now Available
-
Aug 28, 2006
Concurrent Multi-Mode Optimization Speeds Timing Closure
-
Aug 21, 2006
Topographical Technology Improves Designer Efficiency and Reduces Turnaround Time
-
-
Aug 16, 2006
Acquisition Will Enable Tighter Integration With DFM and Manufacturing Tools to Optimize Yield and Increase Predictability
-
-
Aug 2, 2006
Variation-based Models Built on Proven Composite Current Source Technology to Deliver Improved Accuracy
-
Jul 27, 2006
VhdlCohen Publishes A Pragmatic Approach to VMM Adoption: 'A SystemVerilog Framework for Testbenches'
-
Jul 26, 2006
EDA Company Honored for Key Contributions to Open Source Parser for Liberty™ Library Format
-
Jul 26, 2006
Checkers Proven to Accelerate Customer Adoption of SystemVerilog Assertions to Benefit Entire Industry
-
Jul 25, 2006
Scalable DFM Checks Accelerate Time-to-Yield for Designers
-
Jul 24, 2006
Toshiba to Deploy Integrated, Production-Proven DFM Technology into Standard Layout Flow
-
Jul 24, 2006
Built on Gold Standards, PrimeTime VX and Star-RCXT VX Tools Deliver Foundation for Comprehensive Variation-aware Design Solution for Sub-65nm Design
-
Jul 24, 2006
Integration of Production-Proven Design and Manufacturing Technology Accelerates Time to Yield
-
Jul 20, 2006
More Than 50 Tapeouts Prove DFT MAX Reduces Test Time and Cost
-
Jul 19, 2006
Multiple Multi-Voltage Tapeouts Completed With Galaxy Advanced Low-Power Solution
-
Jul 19, 2006
Common Platform Technology Reference Flow Adds Critical Area Design-for-Manufacturing Capability in IC Compiler
-
Jul 18, 2006
Reference Flow 7.0 Incorporates Latest Technologies for Low Power and Yield Optimization to Address 65-nanometer Design Challenges
-
Jul 18, 2006
Users Embrace the VMM Methodology for SystemVerilog and Synopsys' VCS® Native Testbench
-
Jul 13, 2006
Founding Technical Advisory Board Members to Hold Inaugural Meeting at Design Automation Conference in San Francisco
-
Jul 12, 2006
Synopsys Expands DesignWare Library With More Than 20 New IP Components
-
Jul 11, 2006
Synopsys USB, PCIe, SATA and XAUI PHYs for High-Volume, Low-Power Applications Available for Foundries' Leading-edge Processes
-
Jul 5, 2006
VCS Native Testbench (NTB) and the Verification Methodology Manual (VMM) for SystemVerilog Help Accelerate Aggressive Verification Schedule
-
Jun 29, 2006
Sunplus Selects Synopsys Professional Services to Achieve Aggressive Schedule and Cost Goals
-
Jun 28, 2006
Silicon-Proven DesignWare PHY Cuts Power and Size in Half for Portable, High-Volume Consumer SoCs
-
Jun 28, 2006
NanoTime Extends Synopsys' Leadership in Transistor-Level Simulation and Analysis
-
Jun 27, 2006
IC Compiler Reduces Chip Cost by Achieving Over 90% Area Utilization
-
Jun 26, 2006
Release Brings New Advances in Yield, Low Power, and Testability
-
-
-
Jun 13, 2006
Sentaurus TCAD Accelerates Advanced Technology Development With New Process and Device Modeling Capabilities
-
Jun 13, 2006
Synopsys' Galaxy™ Design and Discovery™ Verification Platforms and DesignWare® IP to Accelerate SoC Development
-
-
Jun 7, 2006
Bridge Delivers High-Throughput Connection to Multiple PCI Express Technology-Based Systems and Peripherals
-
-
May 25, 2006
Automated Prototyping Flow Delivers Predictable Time-to-Tapeout
-
-
-
-
May 17, 2006
Industry's First Extraction Tool Verified for TSMC 65nm Designs
-
May 17, 2006
Complete Tool Suite From TCAD to Design to Mask Synthesis Enables Yield Enhancement Concurrently With Area, Timing and Power Optimization
-
May 17, 2006
DesignWare® Users Get Easy Access to TSMC's 65-nm Standard Cells, I/Os and Memory Compilers
-
May 16, 2006
Acquisition to Address Exponentially Growing Software Design Bottleneck
-
May 15, 2006
Enhanced Methodology Accelerates Time-to-Market for ARM Processors, Including Next-generation ARM Cortex-R4 Processor
-
May 11, 2006
Liberty Technical Advisory Board to Build on Composite Current Source Modeling Technology to Address Future Industry Needs
-
May 8, 2006
Accurate Prediction of Post-Layout Design Results in Synthesis Enhances Productivity and Accelerates Timing Closure
-
-
May 3, 2006
Sun Microsystems Executive to Present Keynote
-
May 2, 2006
Industry-Standard SystemVerilog Enables Advanced Verification of Complex VHDL Designs
-
May 2, 2006
Silicon-Proven Mixed-Signal PHYs Reduce Risk and Speed Time to Production for BiTMICRO's Flash Solid State Disk Drives
-
Apr 26, 2006
Interoperability With Hitachi Microdrive 3K8 CE-ATA Hard Drive Enables Rapid Adoption of CE-ATA Interface
-
Apr 25, 2006
VDA / FAT-AK30 Expands Reference Simulator Support of Mechatronic Libraries
-
Apr 24, 2006
Cites Predictability, Faster Time-to Market and Ease of Deployment as Key Benefits
-
Apr 19, 2006
New Book by Janick Bergeron Provides Techniques for Writing, Running, Debugging and Verifying the Correctness of SystemVerilog Testbenches
-
Apr 19, 2006
Agere Chooses Synopsys in Major Productivity Drive
-
Apr 18, 2006
DFT MAX Adaptive Scan Technology Enables Predictability Through First-Silicon Success
-
Apr 17, 2006
Synopsys' PSM Technology Enables Higher Yield for High-Performance Products
-
Apr 3, 2006
Galaxy's Complete RTL-to-GDSII Low-Power Solution Critical for Market Success
-
Mar 30, 2006
Synopsys Tools Aid Microelectronic Design in New Birck Nanotechnology Center
-
-
Mar 28, 2006
Aart de Geus and Steve Wozniak Address Nearly 1,300 Engineers at 16th Annual User's Conference
-
Mar 28, 2006
Synopsys Discovery™ Verification Platform Provides a Complete Verification Solution From System Level Through RTL to Gates
-
Mar 28, 2006
Institute to Receive World-Class Tools for Advancing Education in Electronic Design