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  • Oct 31, 2012
    New Features Include Fast Error Identification, Incremental Fix and Customizable Reporting for Faster FPGA Implementation and Prototype Bring-Up

    Highlights: New debug flows for multiple error isolation and incremental fix capabilities enable faster implementation of large FPGA...

  • Oct 29, 2012
    Next-generation Discovery Verification IP Enables Identification and Debug of SoC Performance Bottlenecks

    Synopsys, Inc. (NASDAQ: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic...

  • Oct 22, 2012
    UMC Qualification Brings More Process and Foundry Choices to IC Compiler and IC Validator User Base

    Highlights: IC Validator brings In-Design physical verification to designers working at UMC's 28nm node In-Design physical verification...

  • Oct 17, 2012
    Excellent Customer Support, Technical Leadership and Number of Customer Tape-Outs Cited as Key Selection Criteria

    Highlights: Selection based on customer feedback, TSMC-9000 compliance, technical support excellence and number of customer tape-outs Synopsys'...

  • Oct 17, 2012
    Recognizes Synopsys' Valuable Contributions towards Development of 20-nm Technology

    Synopsys, Inc. (Nasdaq:SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic...

  • Oct 16, 2012
    Synopsys' Saber Physical Modeling and Simulation Platform to be used in 57 Worldwide Automotive Design Educational Programs

    Synopsys, Inc. (Nasdaq:SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems,...

  • Oct 15, 2012
    Design Tools Selected in Reference Flow for Physical Implementation, RC Extraction, Timing Analysis and Physical Verification

    Highlights: TSMC 20nm Reference Flow deployed by early adopters for design enablement Flow provides proven support for double patterning,...

  • Oct 11, 2012
    Design Tools Selected in TSMC's First Integrated, Validated Reference Flow and Design Kit Enabling Multi-Die Integration Using TSMC CoWoS Technology

    Highlights: Supports multi-die integration using TSMC CoWoS™ technology Includes enhanced versions of Synopsys' Galaxy™ Implementation...

  • Oct 9, 2012
    CODE V version 10.5 is now generally available

    Highlights: Direct optimization method can reduce sensitivity of optical systems to manufacturing tolerances, improve as-built performance and...

  • Oct 5, 2012
    Synopsys Hosts 418 Bright, Young Professionals from 14 Countries at the Seventh Annual International Microelectronics Olympiad of Armenia during Synopsys Week

    Synopsys, Inc. (Nasdaq:SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems,...