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MOUNTAIN VIEW, Calif., Oct 23, 2019 Highlights: Astera Labs' Aries Smart Retimer is the industry's first 32GT/s retimer SoC designed to the PCIe 5.0 specification. It doubles the signal reach and...
Highlights: Synopsys ARC VPX5 and VPX5FS DSP Processors are based on an extended instruction set and VLIW/SIMD architecture optimized for highly parallel processing Multiple vector floating-point...
Highlights: TSMC selects Synopsys as its "Partner of the Year" for interface IP and tool enablement for 9th consecutive year Synopsys recognized for collaboration on Interface IP, joint...
Highlights: Synopsys Fusion Design Platform and Custom Design Platform support 7LPP SoCs and SUB20LPIN silicon interposer Immediate foundry customer deployment through Samsung customized design...
Highlights: Samsung Foundry and Synopsys enable Samsung's automotive reference flow to meet target ASILs for safety-critical designs Synopsys' differentiated solutions give designers the ability...
