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Jun 26, 2013

Synopsys and UMC Collaborate to Accelerate Development of UMC's 14-nm FinFET Process

Process Qualification Vehicle Tapeout Validates UMC 14-nm FinFET Process Using Synopsys DesignWare IP and StarRC Parasitic Extraction Tool

Highlights First collaboration milestone speeds validation of IP and design correlation on UMC's 14-nm FinFET process...
Jun 25, 2013

Synopsys Demonstrates Industry's First M-PCIe IP Interoperability

Comprehensive DesignWare IP Solution, Including Silicon-Proven MIPI M-PHY and M-PCIe Controller IP, Enables Early M-PCIe Adoption for Low-Power Designs

Highlights: Industry's first M-PCIe® IP interoperability demonstration, developed in conjunction with Intel, unveiled at PCI-SIG® Developers...
Jun 24, 2013

Synopsys Collaborates with A*STAR IME to Optimize TSI Technology

Synopsys Brings its Expertise in 3D-IC Solutions to Singapore's A*STAR IME-Led 2.5D Through-Silicon Interposer Consortium

Collaboration will provide the framework for heterogeneous 2.5D/3D-IC systems Will optimize silicon interposer technology for...
Jun 19, 2013

OCZ Technology Group Achieves First-Pass Silicon Success with DesignWare IP and Synopsys Professional Services

Silicon-Proven DesignWare IP and Consulting Services Reduce Integration Risk and Help Accelerate Deployment of Complete SoC Design Flow

Highlights: OCZ achieved first-pass silicon success for its NAND flash Vector SSD with Synopsys' DesignWare DDR2/3-Lite PHY, Embedded Memories...
Jun 17, 2013

Synopsys Delivers 2X Speedup for Implementing and Verifying Functional ECOs

New Formality Ultra Extends Equivalency Checking to Accelerate Design Closure

Highlights: New Synopsys Formality® Ultra solution cuts days of effort for each functional engineering change order (ECO) Includes advanced...

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