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Jan 29, 2014

CEVA Utilizes Synopsys' Design Compiler Graphical to Achieve Higher Frequency and Smaller Area for its DSP Cores

Expedites CEVA's Implementation of its DSPs by Simplifying the Back-end Flow with Highly Predictable Results

Highlights: Predictable flow with minimum iterations through tight correlation with Synopsys' IC Compiler™ place-and-route solution Delivers...
Jan 28, 2014

Synopsys Announces Immediate Availability of Multiprotocol DesignWare Enterprise 12G PHY IP

High-Performance PHY IP Supports 1.25 Gbps to 12.5 Gbps Throughput and Cuts Power Consumption by up to 20 Percent for High-End Networking and Computing Applications

Highlights: Support for 1.25 Gbps to 12.5 Gbps data rates covers a broad range of protocols, including PCI Express® 3.0, SATA 6G, 10GBASE-KR,...
Jan 28, 2014

Fujitsu Semiconductor and Synopsys Deliver an Optimized and Predictable Customized SoC (ASIC) Design Flow

Design Compiler® Early Exploration, Complemented with New Algorithms for Area and Timing Optimization, Improves Design Utilization and Accelerates Time-to-Market

Highlights: Early design exploration accelerates creation of high-quality RTL and floorplan Monotonic area optimization improves design...
Jan 8, 2014

Synopsys Co-CEO Aart de Geus to Speak at 16th Annual Needham Growth Conference

Synopsys, Inc. (Nasdaq:SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic...
Dec 17, 2013

Synopsys Announces Release 2013.12 of the RSoft Product Family

Latest Release Enhances Design of Photonic Components and Optical Networks

Highlights: Enhanced modeling of optical surface scattering for subwavelength optical components Faster photonic device simulations Expanded...

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